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CN-121979733-A - NoC verification method, device and equipment supporting RTL dynamic adaptation

CN121979733ACN 121979733 ACN121979733 ACN 121979733ACN-121979733-A

Abstract

The application discloses a NoC verification method, a device and equipment supporting RTL dynamic adaptation, and relates to the technical field of chips, wherein the method comprises the steps of publishing an RTL new version together with an IP-XACT file, a NoC design document and a Database file, analyzing the IP-XACT file and the NoC design document through an automatic tool established in advance, automatically connecting and configuring an AMBA VIP and updating a NoC verification platform; analyzing the Database file through the automation tool, and detecting the content consistency of the IP-XACT file, the NoC design file and the Database file, wherein the automation tool comprises a component for generating a NoC verification platform and a component for detecting the content consistency. The application can realize the efficient verification of complex scenes such as end-to-end communication of multiple nocs, cross-NoC access and the like in the SoC-level verification environment.

Inventors

  • YANG LEI
  • ZHANG YAN
  • SUN YUHAO
  • YU BAODONG

Assignees

  • 湖北芯擎科技股份有限公司

Dates

Publication Date
20260505
Application Date
20260403

Claims (10)

  1. 1. The NoC verification method supporting RTL dynamic adaptation is suitable for a multi-NoC heterogeneous integrated SoC design verification scene, and is realized based on a NoC verification framework of a virtual Module Dummy Module, and is characterized by comprising the following steps: The RTL new version is issued together with the IP-XACT file, the NoC design file and the Database file, the IP-XACT file and the NoC design file are analyzed through an automation tool which is established in advance, and an AMBA VIP is automatically connected and configured, and a NoC verification platform is updated; analyzing the Database file through the automation tool, and detecting the content consistency of the IP-XACT file, the NoC design file and the Database file; wherein the automation tool includes components for generating a NoC verification platform, and components for content compliance detection.
  2. 2. The NoC authentication method supporting RTL dynamic adaptation of claim 1, wherein: In the SoC design, a plurality of NoCs with different configurations are adopted as an on-chip bus interconnection architecture, each NoC comprises a plurality of AMBA interfaces for connecting IP cores with different specifications, and cross access between master and slave devices is realized through a routing mechanism.
  3. 3. The NoC verification method supporting RTL dynamic adaptation of claim 2, wherein the AMBA VIP is mounted on Hierarchy where an IP core is located, and dynamically replaces a physical IP core connected with the NoC.
  4. 4. The NoC authentication method supporting RTL dynamic adaptation of claim 2, wherein: Providing information of each AMBA interface in the IP-XACT file and the NoC design document, and providing signal information of interruption, fault and fault injection in the NoC; The information of AMBA interface includes version information, individual signals, bit width information, hierarchy information, desired Clock/Reset information, and function support information.
  5. 5. The NoC authentication method supporting RTL dynamic adaptation of claim 4, wherein: And the component used for generating the NoC verification platform in the automation tool analyzes the information of the AMBA interface and the signal information, automatically connects with the AMBA VIP and configures the components required by the AMBA VIP and the NoC verification platform.
  6. 6. The NoC authentication method supporting RTL dynamic adaptation of claim 5, wherein: When there is an update to the SoC design, the automation tool parses the IP-XACT file and NoC design document to update the NoC verification platform.
  7. 7. The NoC authentication method supporting RTL dynamic adaptation of claim 1, wherein: when the content of the IP-XACT file, the NoC design file and the Database file are detected to be inconsistent, error reporting is carried out, and RTL modification prompt is carried out.
  8. 8. A NoC authentication device supporting RTL dynamic adaptation, wherein the NoC authentication device supporting RTL dynamic adaptation comprises: The analysis module is used for issuing the RTL new version together with the IP-XACT file, the NoC design document and the Database file, analyzing the IP-XACT file and the NoC design document through an automatic tool which is created in advance, automatically connecting and configuring an AMBA VIP and updating a NoC verification platform; The anterior inspection module is used for analyzing the Database file through the automation tool and detecting the content consistency of the IP-XACT file, the NoC design file and the Database file; wherein the automation tool includes components for generating a NoC verification platform, and components for content compliance detection.
  9. 9. The NoC authentication device supporting RTL dynamic adaptation of claim 8, wherein the pre-verification module is further configured to: When the content of the IP-XACT file, the NoC design file and the Database file are detected to be inconsistent, error reporting is carried out, and RTL modification prompt is carried out.
  10. 10. A NoC authentication device supporting RTL dynamics, characterized in that it comprises a processor, a memory, and a NoC authentication program supporting RTL dynamics stored on the memory and executable by the processor, wherein the NoC authentication program supporting RTL dynamics is executed by the processor to implement the steps of the NoC authentication method supporting RTL dynamics according to any one of claims 1 to 7.

Description

NoC verification method, device and equipment supporting RTL dynamic adaptation Technical Field The application relates to the technical field of chips, in particular to a NoC verification method, device and equipment supporting RTL dynamic adaptation. Background Referring to fig. 1, currently, AMBA VIP (AMBA Verification IP, AMBA verification intellectual property core) is generally directly connected to a NoC (Network on Chip) boundary, and function verification is performed on NoC IP (Intellectual Property Core ) itself by controlling AMBA VIP to generate test cases. The AMBA VIP is generally connected by manual connection, macro connection definition and automation connection, but the prior art scheme uses automation connection AMBA VIP without using international standard IEEE 1685-2009 (IP-XACT) file. IEEE 1685-2009 is a technical standard of the release of IP-XACT 2009 version officially approved by the IEEE standards institute, which defines standardized XML schemas and specifications required to describe, integrate, electronic integrated circuit IP cores. IP-XACT is an XML-based, open, standardized format specification for describing, encapsulating and integrating IP cores in electronic circuits, the core goal of which is to provide a machine-readable unified language for IP description and data exchange, thereby enabling seamless interfacing and automation between different tools in the design flow. However, the conventional verification method has the following defects: (1) The verification level is incomplete, the existing scheme only performs function verification on the NoC IP, lacks a System on Chip (SoC) level verification environment constructed based on a virtual Module (Dummy Module), cannot perform integrated logic verification, and lacks logic function verification in a subsystem level; 2. The standardization degree is low, the prior art scheme does not adopt an IEEE 1685-2009 (IP-XACT) file to connect with AMBA VIP, so that the portability of the verification environment is poor; 3. The prior art scheme does not utilize RTL (Register-TRANSFER LEVEL, register transmission level) to compile a Database generated during compiling the RTL to conduct early checking of design specifications, does not check an IP-XACT file output by an integration tool, and therefore cannot find errors before simulation to influence the verification efficiency, for example, verification environment is inconsistent with the RTL due to Clock signal name errors provided in a NoC design document, so that simulation fails, and verification environment is imperfect due to the fact that the content of the IP-XACT file does not meet the requirements of the NoC design document. Disclosure of Invention The application provides a NoC verification method, device and equipment supporting RTL dynamic adaptation, which can realize efficient verification of complex scenes such as end-to-end communication, cross-NoC access and the like of multiple NoCs in a SoC-level verification environment. In a first aspect, an embodiment of the present application provides a NoC verification method supporting RTL dynamic adaptation, which is applicable to a SoC design verification scenario of heterogeneous integration of multiple nocs, and is implemented based on a NoC verification architecture of a virtual Module Dummy Module, where the NoC verification method supporting RTL dynamic adaptation includes: The RTL new version is issued together with the IP-XACT file, the NoC design file and the Database file, the IP-XACT file and the NoC design file are analyzed through an automation tool which is established in advance, and an AMBA VIP is automatically connected and configured, and a NoC verification platform is updated; analyzing the Database file through the automation tool, and detecting the content consistency of the IP-XACT file, the NoC design file and the Database file; wherein the automation tool includes components for generating a NoC verification platform, and components for content compliance detection. With reference to the first aspect, in one embodiment, In the SoC design, a plurality of NoCs with different configurations are adopted as an on-chip bus interconnection architecture, each NoC comprises a plurality of AMBA interfaces for connecting IP cores with different specifications, and cross access between master and slave devices is realized through a routing mechanism. With reference to the first aspect, in one implementation, the AMBA VIP is mounted on a Hierarchy where an IP core is located, and dynamically replaces a NoC-connected physical IP core. With reference to the first aspect, in one embodiment, Providing information of each AMBA interface in the IP-XACT file and the NoC design document, and providing signal information of interruption, fault and fault injection in the NoC; The information of AMBA interface includes version information, individual signals, bit width information, hierarchy information, desired Cl