CN-121980130-A - In-situ light perception probability calculation system and photoelectric hybrid calculation method thereof
Abstract
The invention provides an in-situ light perception probability calculation system and a photoelectric hybrid calculation method thereof, wherein the system comprises a tightly coupled light signal projection front end, a photoelectric probability bit array, a driving module, a reading module and a micro control unit, wherein the photoelectric probability bit array comprises a plurality of photoelectric probability bit units, the driving module comprises a decoder and a grid voltage generator, the reading module comprises a comparator group and a reference voltage source corresponding to the comparator group, the micro control unit is a digital logic circuit, the photoelectric sensing function and the probability calculation function are integrated in the same unit, the light signal is used as external excitation to directly determine the initial activation probability of a neuron, the in-situ loading of image data is realized, the electric signal is used as internal excitation bearing weight and bias information, the electric control grid voltage is regulated, and the operation update of a neural network is realized.
Inventors
- LIU FEI
- XIA CHENHAO
- WANG HAOXUAN
- CHEN WEICAN
- FU YUNYI
Assignees
- 北京大学
Dates
- Publication Date
- 20260505
- Application Date
- 20251231
Claims (6)
- 1. The in-situ light perception probability computing system is characterized by comprising a tightly coupled light signal projection front end, a photoelectric probability bit array, a driving module, a reading module and a micro control unit, wherein the light signal projection front end is integrated above the photoelectric probability bit array and comprises an optical lens group, a mechanical or electronic shutter and a corresponding light path calibration component, external image or light intensity distribution information is used as original input data of the system, the light signal is directly projected through the lens group and focused on the surface of the photoelectric probability bit array, the opening and closing state of the shutter strictly controls the perception and computation time sequence of the system, when the shutter is opened, the light signal passes through the lens and directly irradiates to a photosensitive area on the surface of a chip, the spatial distribution of the light intensity directly corresponds to an input weight matrix in a neural network, and thus parallel loading and primary feature extraction of the signal are completed on a physical level; The photoelectric probability bit array is formed by closely arranging a plurality of photoelectric probability bit units in a matrix form of M rows and N columns, wherein the source electrode and the drain electrode of a photoelectric oxide thin film transistor in each photoelectric probability bit unit are grounded, the connection node of the photoelectric probability bit unit and the source electrode are connected to one end of a comparison resistor, the connection node of the photoelectric probability bit unit and the source electrode is an output node of the unit, and the other end of the comparison resistor is a voltage input end; the driving module comprises a decoder and a grid voltage generator, wherein the grid voltage generator extends to a resistor voltage input end and an electric control grid electrode in the photoelectric probability bit array through a word line and a power line respectively, the module is used for probability bias regulation and control, the grid voltage generator applies precisely regulated and controlled voltage V g to the electric control grid electrode of the gating column, the voltage directly acts on the electric control grid electrode of the photoelectric oxide thin film transistor, and the central position of the Sigmoid activation function is shifted by changing the threshold voltage of the transistor; The reading module consists of an array level comparator group of 1 row and N column and a reference voltage source of 1 row and N column corresponding to the array level comparator group, wherein the tail end of a bit line connected with an output node of a photoelectric probability bit unit is directly connected to the input end of a voltage comparator, the bit line transmits an analog potential signal V node which is jointly determined by illumination intensity and electric control grid voltage, and the analog potential signal is superimposed with intrinsic physical noise due to the random fluctuation characteristic of carriers in the photoelectric oxide material; The micro control unit is connected with the decoder, the grid voltage controller and the reference voltage source through a bus structure and used for controlling the modules to respectively generate response voltages, and meanwhile connected with the comparator array through the bus structure and used for controlling the probability bit stream generated by collection and carrying out statistical sampling and calculation solving on the probability bit stream to finish conversion from optical analog quantity to random digital quantity.
- 2. The in-situ light perception probability calculation system of claim 1, wherein the photoelectric probability bit unit comprises two working modes of light control and electric control; (1) A light control mode; According to the photoelectric response characteristic of the photoelectric oxide thin film transistor, the incident light intensity is directly mapped into an input item of an activation function; (2) An electric control mode; The electric control grid voltage is directly mapped to the input item of the activation function.
- 3. A method for preparing a photoelectric probability bit cell, for use in the in situ photo-aware probability computing system of claim 2, comprising the steps of: Step 1, cleaning a substrate and preparing a bottom electric control grid, wherein the specific method comprises the steps of using a standard organic cleaning process to process a target substrate, depositing a metal layer for preparing the bottom electric control grid on the whole substrate, patterning the metal layer in a photoetching mode, and etching away the redundant metal layer in an etching mode; step 2, growing a gate dielectric layer and depositing the gate dielectric layer; The active channel layer is deposited and regulated, the active layer is deposited by using a method of co-sputtering an active layer target material and a titanium nitride target material, the power ratio of the active layer target material and the titanium target material is controlled to enable nitrogen element and titanium element doping to be formed in the active layer, then the active layer is patterned by using a photoetching mode, and then the redundant active layer is etched by using an etching mode to form a patterned active layer area; Step 4, preparing the comparison resistor, namely depositing a comparison resistor layer, then patterning the comparison resistor layer by using a photoetching mode, and etching away the redundant comparison resistor layer by using an etching mode to form a patterned comparison resistor area; The method comprises the steps of preparing a source drain electrode and interconnecting the source drain electrode, namely, firstly patterning a source drain metal electrode area by using a photoetching mode, then depositing a metal electrode layer, removing redundant metal materials by using a stripping mode to form a source drain electrode area, enabling the source drain electrode area to form reliable contact with an active layer and a comparison resistor layer; Step 6, preparing and annealing the protective layer, and carrying out a plurality of cyclic metal precursor treatments on the surface of the active layer in advance before the formal growth of the protective layer is started, wherein the specific method is to deposit the protective layer on the whole substrate, then accelerate the atomic arrangement to reach the most stable state by using an annealing mode, reorganize the microstructure in the film, provide a large number of oxygen vacancies, activate the semiconductor characteristic of the active layer, and solidify the defect state density distribution in the channel to form the photoelectric oxide thin film transistor; And 7, photoetching and defining a pressure welding hole area, and then forming a pressure welding hole window by etching.
- 4. The method of claim 3, wherein the active layer material is indium gallium zinc oxide IGZO, and the prepared photovoltaic oxide thin film transistor is a photovoltaic indium gallium zinc oxide transistor OE-IGZO TFT.
- 5. A photoelectric hybrid computing method based on an in-situ light perception probability computing system as claimed in claim 1 or 2 is characterized in that by controlling shutter opening and closing, the system is switched between two independent stages, namely a sensing stage in a light control mode when the shutter is opened, a probability bit unit converts a light signal into a probability bit stream to realize image sensing and input, a computing stage in an electric control mode when the shutter is closed, an electric probability bit unit is used as a hardware neuron to realize the tasks of image identification, reconstruction and generation through neural network reasoning, and a micro control unit cooperates with a decoder and a grid voltage generator to accurately address an array and regulate bias voltage in the whole process.
- 6. The method of claim 5, wherein the specific steps include: (1) A sensing stage in light control mode; At this stage, the micro control unit sends an opening instruction to the shutter device, an optical signal of an external scene is focused by the lens group and is directly projected on the surface of the photoelectric probability bit unit array, at this time, the photoelectric probability bit units in the array work in a light control mode, light control Sigmoid output is directly generated according to the incident light intensity, and the output probability P (y=1) obeys the distribution of the optical Sigmoid: Wherein I ref is reference current, I 0 is normalization coefficient, I d (I opt ) is channel current modulated by light intensity, According to the photoelectric response characteristic of the photoelectric probability bit unit, the incident light intensity is directly converted into the probability of outputting 1, the pixel point with higher light intensity is the pixel point with higher probability of outputting 1 by the corresponding unit, the comparator carries out single comparison on the output node voltage (V node ) and the reference voltage (V ref ) of each unit, and the analog light intensity distribution is instantaneously converted into a probabilistic binary image; (2) Switching modes; After the image acquisition is completed, the micro control unit sends a closing instruction to the shutter device, the system enters a full dark environment and cuts off the modulation effect of external light signals on the device, at the moment, the working mode of the photoelectric probability bit units in the array is switched from a light control mode to an electric control mode, and the physical entropy source of the photoelectric probability bit units is also changed along with the light-excited carrier random fluctuation, so that the photoelectric probability bit units are changed into intrinsic electrical noise generated by the internal interface state and body defects of the device; (3) A calculation stage in an electric control mode; in this stage, the micro control unit encodes the photoelectric probability bit array into an input node, an intermediate layer node and an output node of the neural network, and starts an iterative reasoning process, wherein the input node is responsible for receiving and clamping original image data to establish an initial boundary condition of network evolution, the intermediate layer node is responsible for extracting high-order statistical characteristics of images and establishing nonlinear mapping association between input and output, and the output node is used for converging final states of the whole network after energy optimization so as to output image recognition, image reconstruction or generation results; The micro control unit directly maps the binary image data latched in the register into the initial state of the input node of the neural network, and then calculates the total excitation value of the intermediate layer node or the output node neuron according to the preset network topology structure, the stored weight W ij and the bias b i I.e., the update probabilities of the individual neurons are calculated separately, Based on the calculation result, the method sends an instruction to a grid voltage generator, generates accurate analog bias voltage, applies the accurate analog bias voltage to an electric control grid electrode of a corresponding middle layer node or output node neuron through a decoder, directly translates the center of an electric Sigmoid curve of a device, is equivalent to adjusting the activation threshold value of the neuron on a physical level, drives a probability bit unit to generate random jump by utilizing internal intrinsic electric noise, finally, takes an update bit stream generated by a comparator as output data, feeds back the output data to a micro control unit, is used for updating the state of a neural network node and participates in the next iteration, thereby realizing feedback update and dynamic evolution of the network state, and continuously carries out the cycle under the dispatching of the micro control unit until the preset iteration times are reached; (4) Sample traversal and result statistics After finishing the iterative reasoning of the current single image, the system enters an outer layer loop judging stage, a micro control unit detects whether the test sample is sufficient or not, namely whether the reasoning task of all preset images is finished or not, if the test sample is insufficient, the system jumps back to the starting point of the flow, opens a shutter again to take the next image, and repeatedly executes the steps of in-situ sensing and electric control calculation, if the test sample is sufficient, the micro control unit stops the loop, gathers all reasoning data, and finally outputs the complete image recognition, reconstruction or task generating result.
Description
In-situ light perception probability calculation system and photoelectric hybrid calculation method thereof Technical Field The invention belongs to the technical fields of brain-like calculation, memory calculation and photoelectric detection, and particularly relates to an in-situ light perception probability calculation system based on a photoelectric oxide thin film transistor and a photoelectric hybrid calculation method thereof. Background With the explosive growth of internet of things (IoT), big data, and Artificial Intelligence (AI) technologies, traditional von neumann computing architectures have faced serious challenges in handling this class of data-intensive tasks. In the traditional architecture, the separation of the storage unit and the computing unit causes a huge bottleneck of a storage wall, and particularly when processing image recognition, edge computing and combination optimization problems (such as a traveling business problem and an Xin Moxing solution), the energy efficiency ratio and the instantaneity are difficult to meet the requirements. To solve the above problems, probability calculations (Probabilistic Computing) have been developed as an emerging calculation paradigm. Unlike conventional deterministic calculations (using deterministic 0 s and 1 s), probabilistic calculations utilize the random fluctuation characteristics of probability bits (p-bits) to map system states into probability distributions. The calculation method has great potential exceeding the traditional CMOS logic circuit when processing data with uncertainty and noise interference and solving the complex optimization problem of NP-hard. The core of probability calculation is a randomness source of a hardware level, and how to efficiently and low-power-consumption generate controllable probability output is a research hotspot in the field. However, existing probability calculation hardware and systems have the following significant limitations, particularly in the field of visual information processing: 1. The sensing and the calculation are separated, namely the current intelligent vision system usually adopts a discrete architecture, namely, firstly, an optical signal is converted into an electric signal through an image sensor (such as a CMOS image sensor CIS), the electric signal is converted into a digital signal through an analog-to-digital converter and stored, and finally, the digital signal is transmitted to a central processing unit or a graphic processor for carrying out the operation of a probability algorithm. This "first sensing, retransmission, and then computation" mode results in a large amount of redundant movement of data, and generates huge power consumption and delay, which cannot meet the requirements of real-time intelligent sensing at the edge. 2. Probability hardware lacking in-situ photo-sensing capability existing probability bit (p-bit) implementations rely primarily on electrical devices such as spintronics based on Magnetic Tunnel Junctions (MTJs), memristors (RRAMs), or conventional CMOS pseudo-random number generators. These devices typically accept only an electrical signal as an input to modulate their probability of flipping. When processing the optical signal, the light intensity must be converted into a voltage by an additional photodetector and then input into the probability device. The method not only increases the complexity of the circuit and the occupied chip area, but also introduces noise and nonlinear distortion in the signal conversion process, and limits the application of the system in photoelectric fusion calculation. 3. The conventional oxide TFT has the limitations of application in that the metal oxide TFT is widely used in the field of display driving due to its extremely low leakage current, high electron mobility and easy large-area preparation. In the prior art, although photo detection is performed by utilizing the photosensitive characteristics of oxide TFTs, most efforts are made to eliminate threshold voltage drift caused by illumination, or to design complex compensation circuits (such as 3T1C, 4T2C, etc. pixel circuits) to maintain the deterministic output of the device. In the prior art system, little research is carried out to change waste into valuable, and the probability calculation is directly realized by utilizing the intrinsic random fluctuation characteristic of the oxide thin film transistor with a common structure under illumination. Most of the existing phototransistor schemes pursue deterministic signal output with high signal-to-noise ratio, but neglect to utilize the nonlinear response and randomness of the device itself to illumination intensity to realize direct mapping of light intensity to probability. 4. The complexity and cost of the existing schemes are that although some leading edge research attempts to develop devices with sense and compute integration function, it is generally necessary to introduce complex heterojuncti