CN-121981038-A - Design method of neuromorphic computing chip of mesoscopic olfactory neural network

CN121981038ACN 121981038 ACN121981038 ACN 121981038ACN-121981038-A

Abstract

The invention provides a design method of a neuromorphic computing chip of a mesoscopic olfactory neural network, which can be used for constructing a neuromorphic computing chip integrating multichannel parallel computing and memory computing, and solves the technical problems of poor expansibility, low computing speed, incapability of real-time processing and the like of the neuromorphic computing chip with differential equation description dynamics in the existing software simulation. The method comprises the following steps of constructing a digital logic calculation model of a K0 model of a Frieman K series set of an olfactory neural network, constructing a nonlinear transfer function of the K0 model, constructing a main state machine and a sub-state machine of the K0 model, constructing a KI network and a KII network, and constructing a KIII network.

Inventors

FU JUN
ZHAO BOWEN
MA JILI
YE JIAYU
XING JIANGUO

Assignees

浙江工商大学

Dates

Publication Date: 20260505
Application Date: 20260128

Claims (10)

1. A nerve morphology calculation chip design method of a mesoscopic olfactory nerve network is characterized by comprising the following steps: step one, constructing a digital logic calculation model of a K0 model of a Frieman K series set of the olfactory neural network; The IP core structure of the K0 model is provided with a main state machine, a sub-state machine, a nonlinear transfer function and a weighted summation function; Step two, constructing a nonlinear transfer function of a K0 model; In a hardware implementation, the state machine of the nonlinear transfer function includes five states: an IDLE state, which is an IDLE state, and enters a BSi state after waiting for a control signal start to be pulled up; BSi state, performing multiple binary search, and entering into BSn state after n rounds of search; a BSn state, obtaining the segment number obtained by binary search, and entering an UPDATE state; The UPDATE state, the function value is calculated according to the segment number and updated to the corresponding register; DONE state, namely pulling up the DONE signal and exiting the state machine for finishing the state; Step three, constructing a main state machine and a sub-state machine of a K0 model; step four, constructing a KI network and a KII network; Step five, constructing a KIII network; the KIII network is formed by connecting the K0 model, the KI network and the KII network according to a preset topological structure.
2. The method for designing the neuromorphic computing chip of the mesoscopic olfactory neural network according to claim 1, wherein in a digital logic computing model of the K0 model, only a nerve group connected with an input layer comprises input, simulated biological noise only exists in the input layer and a front olfactory nucleus layer, after the input from other nerve groups is weighted and summed by a weighted summation function, a second-order differential equation is discretely solved by a main state machine through a fourth-order Dragon lattice-Kutta method, so that one iteration solution is completed through computation, a computation result is subjected to nonlinear mapping through a nonlinear transfer function and stored and is used as input of other nerve groups, and a synchronous clock signal in the computing model is used for time sequence driving of a K0 model state machine and is also used for parallel iterative computation of a plurality of K0 models in a coordinated network.
3. The method for designing a neuromorphic computational chip of a mesoolfactory neural network of claim 1 or 2, wherein the K0 model dynamics are described by a second order differential equation.
4. The method for designing a neuromorphic computing chip of a mesoscopic olfactory neural network of claim 3, wherein said master state machine is configured to solve said second differential equation by discrete, fourth-order Dragon-Kutta method at a time step n+1.
5. The method for designing a neuromorphic computing chip of a mesoscopic olfactory neural network of claim 3, wherein the method is characterized in that a tangential slope matching segmentation strategy is adopted for function fitting when a nonlinear transfer function is constructed, and a binary search method is adopted for segment interval search.
6. The method for designing a neuromorphic computational chip of a mesoolfactory neural network of claim 4, wherein said master state machine comprises: an IDLE state, which is an IDLE state, waiting for the control signal start to be pulled up and entering a T1 state; the states T1-T4 are respectively and correspondingly solved the fourth-order Dragon lattice-library tower related parameters; the UPDATE state is used for solving a new potential value of the nerve group according to the fourth-order Dragon-Kutta related parameters; the DONE state, which is a completion state, indicates that one calculation is complete, pulls up the DONE signal and enters the IDLE state to wait for the next start signal.
7. The method for designing a neuromorphic computational chip of a mesoolfactory neural network of claim 4, wherein, when constructing the sub-state machine, the flow of the first K0 model is designed as follows: The method comprises the steps of triggering a start signal to enter a Ti state, then entering a Ti_ASSIGNENT state to be assigned to a register corresponding to a first derivative and a second derivative in the nerve group, then entering a Ti_ CALCULATE _SIG state to calculate a nonlinear transfer function value corresponding to the nerve group value, storing the nonlinear transfer function value in a corresponding register, waiting until a sigmoid_done signal is pulled high to indicate that the Ti_ CALCULATE _SIG state is completed, entering a next stage Ti_DATA_RECEIVE state to be used for receiving the nonlinear transfer function value from the connected nerve group, then entering a Ti_ CALCULATE _ PPLSUM state to collect and sum the received values, entering a next Ti_ CALCULATE _Ki state to complete calculation of the Dragon-Kutta correlation coefficient, and finishing calculation of the Dragon-Kutta correlation coefficient when the func_done signal is pulled high to indicate that the operation of a sub-state machine is completed.
8. The method for designing a neuromorphic computational chip of a mesoolfactory neural network of claim 7, wherein, when constructing the sub-state machine, the flow of the second class K0 model is designed as follows: the method comprises the steps of firstly triggering a start signal to enter a Ti state, then entering a Ti_ASSIGNENT state to assign values to registers corresponding to a first derivative and a second derivative in the nerve group, then entering a Ti_ CALCULATE _SIG state to calculate a nonlinear transfer function value corresponding to the value of the nerve group, storing the nonlinear transfer function value in a corresponding register, waiting until a sigmoid_done signal is pulled up to indicate that the Ti_ CALCULATE _SIG state is completed, entering a next stage Ti_DATA_RECEIVE state which is used for receiving the nonlinear transfer function value from the connected nerve group, then entering the Ti_WAIT_ PPLSUM state to WAIT for a plurality of clock cycles, waiting for the first K0 model to finish summarizing and summing the received values in the Ti_ CALCULATE _ PPLSUM state, and entering a next Ti_ CALCULATE _Ki state to finish calculating the correlation coefficient of a Dragon-Kurther, and when a Func_done signal is pulled up to indicate that the calculation of the Dragon-Kurther correlation coefficient is completed, namely, the operation of a sub-state machine is ended.
9. The method for designing a neuromorphic computational chip of a mesoolfactory neural network of claim 8, wherein, when constructing the sub-state machine, the third class K0 model is designed as follows: The method comprises the steps of triggering a start signal to enter a Ti state, then entering a Ti_ASSIGNENT state to be assigned to a register corresponding to a first derivative and a second derivative in the model, then entering a Ti_WAIT_SIG state, waiting for the first type K0 model and the second type K0 model to finish nonlinear transfer function calculation, then entering a Ti_DATA_RECEIVE state in the next stage, wherein the state is used for receiving nonlinear transfer function values from connected nerve groups, then entering a Ti_WAIT_ PPLSUM state, waiting for a plurality of clock cycles, waiting for the first type K0 model to finish summarizing and summing the received values in the Ti_ CALCULATE _ PPLSUM state, entering a next Ti_ CALCULATE _Ki state, finishing the calculation of the Dragon-Kutta correlation coefficient in the state, and finishing the calculation of the Dragon-Kutta correlation coefficient when the func_done signal is pulled up, namely finishing the operation of a sub-state machine.
10. The method for designing a neuromorphic computing chip of a mesoscopic olfactory neural network according to claim 1, wherein the KII network is formed by connecting two K0 model IP cores, and the KII network is formed by connecting four K0 model IP cores.

Description

Design method of neuromorphic computing chip of mesoscopic olfactory neural network Technical Field The invention belongs to the technical field of neuromorphic computing chips, and particularly relates to a neuromorphic computing chip design method of a mesoscopic olfactory neural network, which can be widely applied to brain-like computing scenes in various engineering fields including machine olfaction. Background The neuromorphic calculation is used for developing brain-like algorithms and models with high biological plausibility through deeply simulating the information processing mode and structure of a brain nervous system, and constructing a novel calculation paradigm. The impulse neural network simulates the connection characteristic of neurons and synapses by means of impulse calculation, can realize high-energy-efficiency calculation, and is a core technical route of current nerve morphology calculation. However, the human brain possesses about 860 billions of neurons and 100 trillion synapses, and there are significant differences in morphology and performance of each type of neuron, which makes large-scale faithful simulation of biological nervous systems very complex and cost challenging. Neuroscience research shows that closely connected neuronal populations (i.e., neurons) are the core components of brain structure and functional patterns, and mesoscopic biological neural networks are an indispensable important area in brain science research. The professor Walter J Frieman, a neurobiologist, establishes a Frieman K series set according to the neurocluster theory based on a large number of physiological anatomies and neuroelectrophysiology experiments. The model clearly depicts the olfactory nerve pathway on a mesoscale, and scientifically explains the working mechanism of an olfactory system through a nerve dynamics theory. The model structurally has the characteristics of multi-layer parallelism, feedforward parallelism, node mutual feedback, delay feedback and the like, and extremely high requirements on calculation parallelism are provided. Therefore, the parallel calculation of the model realized by the hardware circuit has important theoretical significance and practical application value. With the rapid development of FPGA technology, digital integrated circuits have been widely used in the implementation of various neural network architectures, including traditional neural networks such as error back propagation networks and self-organizing map networks, and novel neural networks such as deep neural networks and impulse neural networks, which exhibit higher stability and expansibility. Therefore, the parallel calculation of the K series model is realized based on the FPGA technology, and the method has important significance for promoting the engineering application of the mesoscopic olfactory neural network. Disclosure of Invention The invention aims to provide a design method of a neuromorphic computing chip of a mesoscopic olfactory neural network, which can be used for constructing a neuromorphic computing chip integrating multichannel parallel computing and memory computing, and solves the technical problems of poor expansibility, low computing speed, incapability of real-time processing and the like of the neuromorphic computing chip with differential equation description dynamics in the existing software simulation. The invention solves the problems by adopting the technical scheme that the design method of the nerve morphology calculation chip of the mesoscopic olfactory neural network comprises the following steps: step one, constructing a digital logic calculation model of a K0 model of a Frieman K series set of the olfactory neural network; The IP core structure of the K0 model is provided with a main state machine, a sub-state machine, a nonlinear transfer function and a weighted summation function; Step two, constructing a nonlinear transfer function of a K0 model; In a hardware implementation, the state machine of the nonlinear transfer function includes five states: an IDLE state, which is an IDLE state, and enters a BSi state after waiting for a control signal start to be pulled up; BSi state, performing multiple binary search, and entering into BSn state after n rounds of search; a BSn state, obtaining the segment number obtained by binary search, and entering an UPDATE state; The UPDATE state, the function value is calculated according to the segment number and updated to the corresponding register; DONE state, namely pulling up the DONE signal and exiting the state machine for finishing the state; Step three, constructing a main state machine and a sub-state machine of a K0 model; step four, constructing a KI network and a KII network; Step five, constructing a KIII network; the KIII network is formed by connecting the K0 model, the KI network and the KII network according to a preset topological structure. In the digital logic calculation model of the K0 model, onl