CN-121981044-A - Device aging simulation method, device and equipment

CN121981044ACN 121981044 ACN121981044 ACN 121981044ACN-121981044-A

Abstract

The invention discloses a device aging simulation method, device and equipment, relates to the technical field of reliability evaluation of microelectronic semiconductor devices, and aims to solve the problems of low model precision, poor generality, low calculation efficiency and weak compatibility with multi-physical field simulation of devices in the semiconductor device reliability evaluation method in the prior art. The method comprises the steps of performing first electrothermal simulation on a target device structure model to generate carrier temperature distribution information and carrier density distribution information in the target device, wherein the target device structure model is a corrected device model, establishing a defect physical model and a gate dielectric trap capture model based on the carrier temperature distribution information and the carrier density distribution information and combining a rate equation, determining defect distribution information including spatial distribution in the target device according to the established model, and performing second electrothermal simulation on the target device structure model based on the defect distribution information to determine aging electrical characteristic information of the target device.

Inventors

FENG XIAOYUE
WU ZHICHENG
SUN ZEYU
LI ZHIQIANG

Assignees

北方集成电路技术创新中心(北京)有限公司
中国科学院微电子研究所

Dates

Publication Date: 20260505
Application Date: 20251218

Claims (10)

1. A device burn-in simulation method, the method comprising: performing first electrothermal simulation on a target device structure model to generate carrier temperature distribution information and carrier density distribution information in the target device, wherein the target device structure model is a corrected device model; based on the carrier temperature distribution information and the carrier density distribution information, a defect physical model and a gate dielectric trap capturing model are established by combining a velocity equation; determining defect distribution information in a target device according to the established defect physical model and the gate dielectric trap capture model, wherein the defect distribution information at least comprises spatial distribution; and carrying out second electrothermal simulation on the target device structure model based on the defect distribution information, and determining aging electrical characteristic information of the target device.
2. The method of claim 1, wherein performing a first electrothermal simulation on the target device structure model to generate carrier temperature distribution information and carrier density distribution information inside the target device comprises: obtaining a carrier temperature distribution function through first electrothermal simulation: Wherein, the The temperature of the carriers is indicated and, The temperature of the crystal lattice is indicated, Representing the boltzmann constant, Representing the amount of charge, Representing the average time required for a carrier to transfer the kinetic energy obtained from the electric field to the lattice, Indicating the velocity of the carrier drift, Indicating the transverse electric field strength.
3. The method according to claim 2, characterized in that it uses The energy distribution of the unbalanced carrier under the action of an electric field is shown as follows: Wherein, the Representing the normalization constant(s), The energy of the carriers is represented by the energy of the carriers, Represents an energy index, The temperature index is indicated as a function of the temperature, The temperature of the crystal lattice is indicated, Representing the weight coefficient; Determining the degradation rate of the interface state density in the multi-vibration excitation mode based on the energy distribution is as follows: Wherein, the The interface state density at time t is indicated, In order for the probability of transmission to be high, Is a composite probability; And Is the carrier excitation and de-excitation rate; Is the total interface state density; Is the number of excitation orders or vibration quanta.
4. A method according to claim 3, wherein the defect physical model has an energy distribution function as an aging driving force; And determining defect distribution information in the target device according to the established defect physical model and the gate dielectric trap capture model, wherein the defect distribution information comprises the following steps: calculating the energy distribution function based on the carrier temperature distribution information and the carrier density distribution information; Based on the energy distribution function, calculating according to a preset multi-vibration excitation mode model and a single-vibration excitation mode model to obtain interface state density distribution information of the interface between the channel of the target device and the gate dielectric; and calculating according to a preset non-radiation multi-phonon transition model based on the energy distribution function, and determining charge trap distribution information in the gate medium of the target device.
5. The method of claim 4, wherein determining charge trap distribution information inside a gate dielectric of the target device based on the energy distribution function by performing calculations according to a preset non-radiative multi-phonon transition model, comprises: Calculating a capture potential barrier and an emission potential barrier in a preset energy level range through convolution operation based on the energy distribution function; And generating charge trap distribution information in a gate medium of the target device according to the non-radiative multi-phonon transition model based on the capture potential barrier and the emission potential barrier.
6. The method of claim 4, wherein the calculating, based on the energy distribution function, according to a preset multi-vibration excitation mode model and a single-vibration excitation mode model to obtain interface state density distribution information at an interface between a channel and a gate dielectric of the target device includes: according to a preset multi-vibration excitation mode model, adopting the formula: calculating to obtain a first interface state generation rate caused by the multi-vibration excitation mode, wherein, Representing the activation energy of the emission caused by the multiple vibration excitation modes, Representing the composite activation energy resulting from multiple vibration excitation modes, Representing the frequency of emission attempts resulting from multiple vibration excitation modes, Representing the frequency of recombination attempts due to multiple vibration excitation modes, A 1 representing the net activation energy, A 2 representing the net frequency of attempts; According to a preset single vibration excitation mode model, adopting the formula: calculating to obtain a second interface state generation rate caused by a single vibration excitation mode, wherein, Represents the activation energy of recombination caused by a single vibration excitation mode, Representing the frequency of the emission attempt caused by the single vibration excitation mode, Representing the frequency of recombination attempts resulting from a single vibration excitation mode; Representing the carrier flux induced bond reaction rate contributed by the single vibrational excitation mode.
7. The method of claim 1, wherein performing a first electrothermal simulation on the target device structure model to generate carrier temperature distribution information and carrier density distribution information inside the target device comprises: performing first electrothermal simulation on a target device structure model by adopting a fluid dynamics model to obtain physical state distribution of the target device under a specific bias condition, wherein the physical state distribution at least comprises carrier temperature distribution information and carrier density distribution information; performing a second electrothermal simulation on the target device structure model based on the defect distribution information, and determining aging electrical characteristic information of the target device, including: Inputting the defect distribution information as physical parameters related to space positions into the target device structure model, and performing electrical characteristic simulation; and adjusting parameters of the target device structure model according to the actually measured device electrical characteristic data to enable the simulation result to be matched with the actually measured data.
8. The method of claim 1, wherein prior to performing a first electrothermal simulation on the target device structure model to generate carrier temperature distribution information and carrier density distribution information within the target device, the method further comprises: Constructing a basic structure model of the target device; And correcting the basic structure model by adopting experimental data, and adjusting parameters of the basic structure model to obtain a corrected target device structure model, wherein the experimental data at least comprises the actually measured electrical characteristic data of the target device.
9. A device burn-in simulation apparatus, characterized in that the apparatus is applied to the device burn-in simulation method according to any one of claims 1to 8, the apparatus comprising: the first electrothermal simulation module is configured to perform first electrothermal simulation on a target device structure model to generate carrier temperature distribution information and carrier density distribution information in the target device, wherein the target device structure model is a corrected device model; The defect physical model and gate dielectric trap capture model construction module is configured to establish a defect physical model and a gate dielectric trap capture model based on the carrier temperature distribution information and the carrier density distribution information and combined with a rate equation; the internal defect distribution information determining module is configured to determine defect distribution information in the target device according to the established defect physical model and the gate dielectric trap capture model, wherein the defect distribution information at least comprises spatial distribution; And the second electrothermal simulation module is configured to perform second electrothermal simulation on the target device structure model based on the defect distribution information and determine aging electrical characteristic information of the target device.
10. A device burn-in simulation apparatus, the apparatus comprising: the device aging simulation method of the invention according to any one of claims 1-8, wherein the processor is configured to execute the device aging simulation method according to any one of claims 1-8 when the processor runs the computer program.

Description

Device aging simulation method, device and equipment Technical Field The present invention relates to the field of reliability evaluation technologies for microelectronic semiconductor devices, and in particular, to a device aging simulation method, apparatus, and device. Background In the field of reliability evaluation of semiconductor devices, it is important to accurately predict the aging performance of the devices under electrothermal stress. The existing evaluation methods have various limitations. In the aspect of a theoretical model, an empirical formula based on fitting of a specific device lacks universality, a reactive diffusion model is difficult to reasonably explain a negative bias temperature instability relaxation phenomenon in a deep submicron device, and a unified compact model based on a trap can predict specific degradation behaviors, but the model is complex and highly dependent on experimental data, so that popularization and application are limited. In the aspect of experimental methods, widely adopted measurement-stress-measurement methods can cause recovery of a degraded part when stress is interrupted, so that measured values deviate from true values, and errors are introduced. These limitations make reliability assessment for nanoscale devices face the technical problems of insufficient model accuracy, poor generality, low calculation efficiency, poor compatibility with the overall performance simulation of the device, and the like. Therefore, it is desirable to provide a method that can accurately, efficiently and uniformly evaluate device burn-in and can be closely coupled with device electrothermal simulation. Disclosure of Invention The invention aims to provide a device aging simulation method, device and equipment, which are used for solving the problems of low model precision, poor universality, low calculation efficiency and weak compatibility with multi-physical field simulation of a device in the semiconductor device reliability evaluation method in the prior art. In order to achieve the above object, the present invention provides the following technical solutions: In a first aspect, the present invention provides a device burn-in simulation method, including: performing first electrothermal simulation on a target device structure model to generate carrier temperature distribution information and carrier density distribution information in the target device, wherein the target device structure model is a corrected device model; based on the carrier temperature distribution information and the carrier density distribution information, a defect physical model and a gate dielectric trap capturing model are established by combining a velocity equation; determining defect distribution information in a target device according to the established defect physical model and the gate dielectric trap capture model, wherein the defect distribution information at least comprises spatial distribution; and carrying out second electrothermal simulation on the target device structure model based on the defect distribution information, and determining aging electrical characteristic information of the target device. Optionally, the performing the first electrothermal simulation on the target device structure model to generate carrier temperature distribution information and carrier density distribution information inside the target device includes: obtaining a carrier temperature distribution function through first electrothermal simulation: ; Wherein, the The temperature of the carriers is indicated and,The temperature of the crystal lattice is indicated,Representing the boltzmann constant,Representing the amount of charge,Representing the average time required for a carrier to transfer the kinetic energy obtained from the electric field to the lattice,Indicating the velocity of the carrier drift,Indicating the transverse electric field strength. Alternatively, use is made ofThe energy distribution of the unbalanced carrier under the action of an electric field is shown as follows: ; Wherein, the Representing the normalization constant(s),The energy of the carriers is represented by the energy of the carriers,Represents an energy index,The temperature index is indicated as a function of the temperature,The temperature of the crystal lattice is indicated,Representing the weight coefficient; Determining the degradation rate of the interface state density in the multi-vibration excitation mode based on the energy distribution is as follows: ; Wherein, the The interface state density at time t is indicated,In order for the probability of transmission to be high,Is a composite probability; And Is the carrier excitation and de-excitation rate; Is the total interface state density; Is the number of excitation orders or vibration quanta. Optionally, the defect physical model takes an energy distribution function as an aging driving force; And determining defect distribution information in t