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CN-121981072-A - Bayesian yield optimization method and device based on statistical angle decoupling

CN121981072ACN 121981072 ACN121981072 ACN 121981072ACN-121981072-A

Abstract

The application provides a Bayesian yield optimization method and device based on statistical angle decoupling. The method comprises the steps of setting initial design parameters, determining target yield, obtaining process random parameters, determining worst potential points by means of a Bayesian optimization method, conducting simulation verification on the worst potential points, updating a Gaussian process model to form a worst point set, taking the difference value between the current circuit yield and the target yield as a core target, obtaining split point performance data corresponding to the target failure rate by combining multiple target balance items, determining a statistical angle from the worst point set, obtaining second circuit performance data corresponding to the design parameters, determining the optimal point of circuit performance on the statistical angle through iterative optimization, determining the optimal design parameters according to an optimization target value, repeating statistical angle extraction for the optimal design parameters, obtaining the statistical angle corresponding to the optimal design parameters, and determining whether to conduct new round of design parameter optimization according to whether the yield index is met.

Inventors

  • ZHANG YUE
  • CHENG MING
  • CAO JIA

Assignees

  • 浙江阶数律法科技有限公司

Dates

Publication Date
20260505
Application Date
20260407

Claims (10)

  1. 1. A bayesian yield optimization method based on statistical angle decoupling, the method comprising: setting initial design parameters and determining target yield; Acquiring a process random parameter, and carrying out circuit simulation by combining the initial design parameter to obtain first circuit performance data corresponding to the process random parameter; Establishing a Gaussian process model based on the process random parameters and the first circuit performance data, determining worst potential points in a process random parameter Monte Carlo set by adopting a Bayesian optimization method, performing simulation verification on the worst potential points, updating the Gaussian process model, and repeating the operations of searching points, verifying and updating the model until the worst points of the target quantity are obtained to form a worst point set; taking the difference value of the current circuit yield and the target yield as a core target, acquiring the performance data of the sub-point corresponding to the target failure rate by combining a multi-target balance item, and determining a sampling point of each circuit performance closest to the performance data of the sub-point from the worst point set as a statistical angle; obtaining design parameters, and carrying out circuit simulation on the design parameters aiming at the statistical angle to obtain corresponding second circuit performance data; Constructing a Gaussian process model by taking the design parameters as input and the second circuit performance data as output, determining the circuit performance optimal point on a statistical angle through iterative optimization, determining the termination of the optimization process according to an optimization target value, and determining the optimal design parameters; And repeating the operation of extracting the statistical angle aiming at the optimal design parameters to obtain the statistical angle corresponding to the optimal design parameters, and determining whether to perform a new round of design parameter optimization according to whether the yield index is met.
  2. 2. The method of claim 1, wherein constructing a gaussian process model based on the process random parameters and the first circuit performance data, and determining the worst potential point in the process random parameter monte carlo set using a bayesian optimization method comprises: matching the kernel function according to the process random parameters and the characteristics of the first circuit performance data; Based on the kernel function, calculating the random parameters of the process, constructing a covariance matrix reflecting the similarity among the parameter samples, and setting the mean function of the Gaussian process as a constant to obtain an initial Gaussian process model; acquiring a process random parameter Monte Carlo set with a preset scale; Adopting a Bayesian optimization method, taking a parameter point with the worst circuit performance as a target, screening candidate points with the worst performance potential from the process random parameter Monte Carlo set, and carrying out circuit simulation on the screened candidate points by combining the initial design parameters to obtain actual circuit performance data corresponding to the candidate points; And adding the candidate points and the corresponding actual circuit performance data into a data set of an initial Gaussian process model, carrying out optimization solution on the super parameters in the model by maximizing edge likelihood, retraining model parameters to update the Gaussian process model, and repeatedly executing updating operation until the worst points of the target number are screened out.
  3. 3. The method of claim 1, wherein the determining of the target number comprises: The method comprises the steps of obtaining preset scale parameters, wherein the scale parameters are used for controlling the size of a worst point set; Determining the total sample amount of a process random parameter Monte Carlo set, wherein the total sample amount is larger than the sampling number of the process random parameter; and multiplying the scale parameter, the total sample amount and the difference value between 1 and the target yield to determine the target quantity.
  4. 4. The method of claim 1, wherein the obtaining the performance data of the split point corresponding to the target failure rate by combining the multi-target balance item with the difference between the current circuit yield and the target yield as the core target comprises: Taking the difference value between the current circuit yield and the target yield as a core optimization target, and introducing a multi-target balance item for balancing the stability of the circuit performance distribution and the relative fluctuation of performance indexes; Constructing an objective function; And solving the objective function to obtain a target performance vector, determining the variable values which enable each performance index to be respectively equal to the corresponding components in the target performance vector on the worst point set, and combining the performance cumulative probability density function to obtain the quantile performance data corresponding to the target failure rate.
  5. 5. The method of claim 4, wherein constructing an objective function comprises: The method comprises the steps of determining a core optimization direction of an objective function, wherein the objective function takes deviation between a circuit performance accumulated probability density function corresponding to a reduced design parameter and a performance accumulated probability density target reference value of an associated target yield as a primary optimization direction, and simultaneously takes constraint on relative fluctuation of a circuit performance index into consideration; Introducing regularization parameters for adjusting the performance fluctuation constraint weights; taking the standard deviation of the ratio of the performance index to the corresponding reference value as a quantification basis of performance fluctuation, and applying constraint to the standard deviation through the regularization parameter; and integrating a deviation term of the performance cumulative probability density function and the target reference value and a performance fluctuation constraint term with weight to form a target function.
  6. 6. The method of claim 1, wherein constructing a gaussian process model with the design parameters as inputs and the second circuit performance data as outputs, determining an optimal point of circuit performance over a statistical angle by iterative optimization, determining an optimal design parameter from an optimization target value, and terminating the optimization process comprises: taking the design parameters as model input and corresponding second circuit performance data as model output, selecting an adaptive kernel function and an adaptive mean function, and constructing and fitting an initial Gaussian process model; randomly sampling to generate a plurality of potential design parameter candidate values based on posterior distribution of an initial Gaussian process model, and selecting the design parameter candidate value with the highest performance optimal probability in the posterior distribution; if a plurality of performance output indexes exist in the circuit, calculating the circuit performance of each design parameter candidate value under a Gaussian process model corresponding to all statistical angles, extracting the numerical value with the worst performance as the short-circuit performance of the design parameter candidate value, and screening out the design parameter candidate value by iterative optimization to ensure that the short-circuit performance reaches the optimal design parameter candidate value; And stopping iteration when the performance of the short plate reaches an optimization target value, and determining the design parameter candidate value when the iteration is stopped as an optimal design parameter.
  7. 7. The method of claim 1, wherein the setting initial design parameters comprises: acquiring a rated parameter range specified in an industrial standard of a device type based on the device type and the function requirement corresponding to a circuit design target; Combining a preset simulation constraint condition of a circuit simulation tool on the circuit, removing parameter values which lead to circuit simulation error reporting and function failure in the rated parameter range, and obtaining a parameter value range of normal simulation operation of the circuit; And selecting any group of parameter values from the parameter value range of the normal simulation work of the circuit as initial design parameters.
  8. 8. The method of claim 1, wherein the obtaining process random parameters comprises: Determining the value boundary of each dimension of the process random parameters; Sequentially generating sample points in the defined value space of each dimension through a preset recurrence formula based on the generation rule of the Sobber sequence, wherein each sample point needs to cover all dimensions of the random parameters of the process, and adjacent sample points are kept at uniform intervals in the value space; according to the preset initial sampling number, generating a corresponding number of sample points, and combining the sample points into a random tensor according to the initial sampling number and the dimension specification of the process random parameter dimension to obtain the process random parameter.
  9. 9. The method according to claim 1, wherein the method further comprises: Adjusting the target yield according to the actual design requirement to obtain a new target yield; Taking the determined current design parameters as initial design parameters for a new round of optimization; And repeatedly executing the iterative optimization process based on the new round of optimized initial design parameters by taking the new target yield as a reference until the design parameters conforming to the new target yield are obtained.
  10. 10. The Bayesian yield optimization device based on statistical angle decoupling is characterized by comprising a determining module, a simulation module and a processing module; The determining module is used for setting initial design parameters and determining target yield; The simulation module is used for acquiring process random parameters, and carrying out circuit simulation by combining the initial design parameters to obtain first circuit performance data corresponding to the process random parameters; The processing module is used for constructing a Gaussian process model based on the process random parameters and the first circuit performance data, determining worst potential points in a process random parameter Monte Carlo set by adopting a Bayesian optimization method, carrying out simulation verification on the worst potential points and updating the Gaussian process model, and repeating the operations of searching points, verifying and updating the model until the worst points of the target quantity are obtained to form a worst point set; The determining module is further configured to obtain performance data of the sub-points corresponding to the failure rate of the target by using a difference value between the current circuit yield and the target yield as a core target and combining a multi-target balance item, and determine, from the worst point set, a sampling point, where each circuit performance is closest to the performance data of the sub-points, as a statistical angle; The simulation module is further used for obtaining design parameters, and conducting circuit simulation on the design parameters aiming at the statistical angle to obtain corresponding second circuit performance data; the determining module is further configured to construct a gaussian process model by taking the design parameter as input and the second circuit performance data as output, determine an optimal point of circuit performance on a statistical angle through iterative optimization, determine that the optimization process is terminated according to an optimization target value, and determine an optimal design parameter; The processing module is further configured to repeatedly perform the operation of extracting the statistical angle with respect to the optimal design parameter, obtain the statistical angle corresponding to the optimal design parameter, and determine whether to perform a new round of design parameter optimization according to whether the yield index is satisfied.

Description

Bayesian yield optimization method and device based on statistical angle decoupling Technical Field The application relates to the technical field of integrated circuit design, in particular to a Bayesian yield optimization method and device based on statistical angle decoupling. Background In the integrated circuit design and manufacturing process, process random parameters (such as the deviation of the length and width of a transistor channel) can cause circuit performance to fluctuate, and part of the circuit becomes a failure product due to the fact that the performance exceeds a qualified range, and finally the electric Lu Liang rate is affected. The yield is directly related to the production cost and the product competitiveness, the lower the yield is, the higher the manufacturing cost of unit qualified products is, and the large-scale mass production requirement is difficult to meet. Therefore, the development of circuit yield optimization is one of the core requirements in the design stage of integrated circuits. The current mainstream yield optimization method in industry is mainly based on process random parameter sampling, generates process parameter samples through importance sampling, random sampling and other modes, acquires performance data by combining circuit simulation, and then builds a statistical model (such as a simple regression model and a basic probability model) to analyze the association relation between parameters and performance. In the optimization process, a single performance index or an initially set fixed yield is often used as a target, a traditional optimization algorithm (such as a gradient descent method) is adopted to adjust design parameters, a statistical angle concept is introduced in part of the methods, and a circuit performance boundary is estimated by selecting a few extreme process parameter combinations (namely statistical angles), so that the optimization process is simplified, and the simulation calculation amount is reduced. However, the existing optimization method has three key defects that firstly, the sampling efficiency is low, the traditional random sampling is easy to generate uneven sample distribution, so that the coverage of process fluctuation is incomplete, the model fitting precision is insufficient, and the accuracy of yield evaluation is affected, secondly, the suitability of multiple targets and dynamic yield is poor, most methods are only optimized for single performance indexes or fixed yield, the balance of multiple performances cannot be considered, when the actual demand needs to improve the target yield, the optimization is needed to be carried out again from zero, the dynamic iteration capability is lacking, thirdly, the optimization precision and the efficiency are difficult to balance, if the simulation is greatly improved, the calculation cost is greatly increased, the optimization period is prolonged, and if the simulation is reduced through simplifying the statistical angle, the stability of the optimized yield is easy to miss a short plate with key performance. Therefore, a method is needed to improve the stability and dynamic adaptation capability of the circuit yield under the premise of controlling the calculation cost, so as to meet the yield requirements in different scenes. Disclosure of Invention In view of the above, the application provides a Bayesian yield optimization method and device based on statistical angle decoupling, which are used for improving the stability and dynamic adaptation capability of circuit yield and meeting the yield requirements in different scenes on the premise of controlling the calculation cost. Specifically, the application is realized by the following technical scheme: the first aspect of the application provides a Bayesian yield optimization method based on statistical angle decoupling, which comprises the following steps: setting initial design parameters and determining target yield; Acquiring a process random parameter, and carrying out circuit simulation by combining the initial design parameter to obtain first circuit performance data corresponding to the process random parameter; Establishing a Gaussian process model based on the process random parameters and the first circuit performance data, determining worst potential points in a process random parameter Monte Carlo set by adopting a Bayesian optimization method, performing simulation verification on the worst potential points, updating the Gaussian process model, and repeating the operations of searching points, verifying and updating the model until the worst points of the target quantity are obtained to form a worst point set; taking the difference value of the current circuit yield and the target yield as a core target, acquiring the performance data of the sub-point corresponding to the target failure rate by combining a multi-target balance item, and determining a sampling point of each circuit performance closest to the p