CN-121982017-A - Wafer three-dimensional measurement data analysis method and device, equipment and storage medium

CN121982017ACN 121982017 ACN121982017 ACN 121982017ACN-121982017-A

Abstract

The application discloses a method, a device, equipment and a storage medium for analyzing three-dimensional measurement data of a wafer, wherein the method comprises the steps of obtaining three-dimensional morphology data of each interconnection structure in the wafer; extracting three-dimensional morphological feature parameters of each interconnection structure and generating a three-dimensional structure model, carrying out statistics on the feature parameters of a plurality of interconnection structures in the same Die to obtain Die level statistics, generating a multi-level visual interface comprising an interconnection structure level view, a Die level view and a wafer level view, establishing a level association structure among the three-level views, and realizing linkage display of different level views. According to the application, through constructing the interconnection structure level, die level and wafer level multi-level visualization interfaces, microscopic interconnection structure data and macroscopic wafer distribution are subjected to level correlation, the defect of splitting of the traditional table and red-green image data is effectively overcome, the omnibearing process analysis from whole to local and from macroscopic to microscopic is realized, and the depth and efficiency of process defect diagnosis are remarkably improved.

Inventors

MA BO
LI JUAN
CHEN YUTONG
WANG YONG
XIANG LEI
JIANG JIANWEI

Assignees

匠岭科技(上海)有限公司

Dates

Publication Date: 20260505
Application Date: 20260330

Claims (19)

1. The wafer three-dimensional measurement data analysis method is characterized by comprising the following steps of: Acquiring three-dimensional morphology data of each interconnection structure in a wafer; Extracting at least one three-dimensional morphological characteristic parameter of each interconnection structure based on three-dimensional morphological data of each interconnection structure, generating a three-dimensional structure model corresponding to each interconnection structure, and generating an interconnection structure level view based on the three-dimensional structure model; according to a preset Die dividing rule, counting three-dimensional morphological feature parameters of a plurality of interconnection structures positioned in the same Die region to obtain Die level statistics, and generating a Die level view based on the Die level statistics; Generating a wafer level view based on the Die level statistics, and And establishing a hierarchical association structure among the interconnection structure level, the Die level and the wafer level, and realizing linkage display of different hierarchical views based on the hierarchical association structure.
2. The method of claim 1, wherein the three-dimensional profile data comprises three-dimensional point cloud data, and wherein the generating the three-dimensional structure model corresponding to each interconnection structure comprises extracting at least one three-dimensional profile characteristic parameter of each interconnection structure based on the three-dimensional point cloud data, and rendering the three-dimensional point cloud data of the interconnection structure to generate the interactive interconnection structure geometric profile model.
3. The method of claim 2, wherein at least one of the following interactions is performed based on the interconnect geometry model: Rotating or scaling the interconnect structure geometry model in response to a perspective operation on the interconnect structure geometry model; Mapping pixel coordinates of the drawn line segments to a three-dimensional point cloud space in response to a drawing operation performed on the interconnection structure geometry model, and calculating geometric parameters based on the mapping result, and And synchronously displaying camera shooting views of the interconnection structure, and performing comparison analysis with the interconnection structure geometric model.
4. The method of claim 3, wherein mapping the pixel coordinates of the drawn line segment to a three-dimensional point cloud space comprises: recording screen pixel coordinates of a line segment start point and a line segment end point; calculating three-dimensional space rays corresponding to screen coordinates by inverse transformation based on the projection matrix and model view matrix of the current view, and And calculating the intersection point of the three-dimensional space ray and the three-dimensional structure model to obtain the actual coordinates of the line segment end points in the three-dimensional point cloud space.
5. The method of claim 1, wherein the step of generating a Die level view comprises generating a Die level thermodynamic diagram, the step of generating a Die level thermodynamic diagram comprising: Mapping three-dimensional morphological feature parameter values in a set parameter mapping interval into corresponding gradual change colors according to a preset color mapping table, wherein the color mapping table equally divides the parameter mapping interval into a plurality of color grades, and distributes corresponding color values for each color grade, and the color values gradually change from a first color to a second color; Configuring abnormal color mapping rule, mapping the three-dimensional morphology feature parameter values outside the parameter mapping interval into abnormal colors, and For each interconnect structure within the Die view area, a graphic area with a corresponding color is drawn at its corresponding location, thereby generating a Die level thermodynamic diagram.
6. The method of claim 5, wherein the step of configuring the abnormal color mapping rule includes mapping parameter values lower than the parameter mapping interval to a first abnormal color and mapping parameter values higher than the parameter mapping interval to a second abnormal color to distinguish between lower anomalies and higher anomalies in the Die-level thermodynamic diagram.
7. The method of claim 1, wherein the generating a wafer level view comprises at least one of: generating a wafer level thermodynamic diagram based on statistics of three-dimensional topographical features of an interconnect structure within Die and supporting dynamic switching for generating statistics of the wafer level thermodynamic diagram, and And marking each Die with a qualified label or a failure label according to a predefined rule, and generating a wafer-level contrasting color view, wherein a first contrasting color is used for representing the qualified Die, and a second contrasting color is used for representing the failure Die, and the first contrasting color and the second contrasting color are two colors which are visually distinguishable.
8. The method of claim 7, further comprising the step of view interaction linkage: responding to the selection operation of the target area in the wafer level thermodynamic diagram, switching to a Die level view corresponding to the target area, displaying detailed information of the Die, and/or And responding to the selection operation of the failure Die in the wafer level contrast color view, displaying information of all failure interconnection structures in the failure Die, and linking to the interconnection structure level view to display a three-dimensional structure model corresponding to the failure interconnection structure.
9. The method of claim 1, further comprising the step of data optimization processing, the step comprising: Rendering only interconnect structure data within the current field of view, and And carrying out hierarchical storage on the interconnection structure data, wherein the data storage priority of the failure interconnection structure is higher than that of the qualified interconnection structure.
10. The method of claim 1, wherein the interconnect structure comprises at least one of bump-like interconnect structures, via-like interconnect structures, planar wire-like interconnect structures, and pad-like interconnect structures.
11. The method of claim 1, wherein the three-dimensional topographical parameters are determined according to a type of interconnect structure: when the interconnection structure is a bump interconnection structure, the three-dimensional morphological characteristic parameter comprises at least one of height, diameter and coplanarity; When the interconnection structure is a through hole interconnection structure, the three-dimensional morphological characteristic parameters comprise at least one of aperture, depth-to-width ratio and sidewall roughness; When the interconnection structure is a planar wiring interconnection structure, the three-dimensional morphological characteristic parameters comprise at least one of line width, line thickness, line spacing and surface roughness; When the interconnect structure is a pad-like interconnect structure, the three-dimensional topographical feature parameters include at least one of height, diameter, surface roughness, and coplanarity.
12. A wafer three-dimensional metrology data analysis apparatus comprising: The data acquisition module is used for acquiring three-dimensional morphology data of each interconnection structure in the wafer; the interconnection structure analysis module is used for extracting at least one three-dimensional morphological characteristic parameter of each interconnection structure based on the three-dimensional morphological data of each interconnection structure, generating a three-dimensional structure model corresponding to each interconnection structure, and generating an interconnection structure level view based on the three-dimensional structure model; the Die analysis module is used for counting three-dimensional morphological feature parameters of a plurality of interconnection structures positioned in the same Die area according to a preset Die dividing rule, obtaining Die level statistics, and generating a Die level view based on the Die level statistics; a wafer level analysis module for generating a wafer level view based on the Die level statistics, and And the hierarchy association and linkage module is used for establishing a hierarchy association structure among the interconnection structure level, the Die level and the wafer level and realizing linkage display of different hierarchy views based on the hierarchy association structure.
13. The wafer three-dimensional metrology data analysis device of claim 12, wherein the three-dimensional topography data comprises three-dimensional point cloud data, and wherein the interconnect structure analysis module is further configured to process the three-dimensional point cloud data and is capable of extracting at least one three-dimensional topography feature parameter for each interconnect structure based on the three-dimensional point cloud data and rendering the three-dimensional point cloud data for the interconnect structure to generate an interactable interconnect structure geometry model.
14. The apparatus of claim 12, wherein generating a Die level view comprises generating a Die level thermodynamic diagram, the Die analysis module comprising: The color mapping unit is used for mapping the three-dimensional morphological feature parameter values in the set parameter mapping interval into corresponding gradual change colors according to a preset color mapping table, wherein the color mapping table equally divides the parameter mapping interval into a plurality of color grades, and each color grade gradually changes from a first color to a second color; an abnormal color mapping unit for configuring an abnormal color mapping rule to map the three-dimensional morphological feature parameter values located outside the parameter mapping interval to abnormal colors, and And the thermodynamic diagram generating unit is used for drawing a graph area with corresponding colors at corresponding positions of each interconnection structure in the Die view area so as to generate a Die-level thermodynamic diagram.
15. The wafer three-dimensional metrology data analysis device of claim 12, the wafer analysis module is characterized by comprising: A wafer level thermodynamic diagram generation unit for generating a wafer level thermodynamic diagram based on statistics of three-dimensional morphological feature parameters of the interconnect structure in Die and supporting dynamic switching for generating statistics of the wafer level thermodynamic diagram, and/or And the wafer-level contrast color chart generating unit is used for marking a qualified label or a failure label for each Die according to a predefined rule to generate a wafer-level contrast color chart, wherein a first contrast color is used for representing the qualified Die, a second contrast color is used for representing the failure Die, and the first contrast color and the second contrast color are visually distinguishable in two colors.
16. The wafer three-dimensional metrology data analysis device of claim 15, wherein the hierarchical association and linkage module is configured to: responding to the selection operation of the target area in the wafer level thermodynamic diagram, switching to the Die level view of the Die corresponding to the target area and displaying the detailed information of the Die, and/or In response to a selection operation of a failed Die in the wafer level contrast view, information of all failed interconnects within the failed Die is displayed and connected in parallel to the interconnect level analysis module to reveal a three-dimensional structural model corresponding to the failed interconnect.
17. An electronic device, comprising: A processor; A memory storing a computer program which, when executed by the processor, performs the steps of the wafer three-dimensional metrology data analysis method of any one of claims 1 to 11; a display device for presenting an interconnection structure level view, a Die level view, and a wafer level view, and And the input device is used for receiving the operation instruction of the view and triggering cross-level linkage display based on the level association structure.
18. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the wafer three-dimensional metrology data analysis method of any one of claims 1 to 11.
19. A computer program product comprising a computer program which, when executed by a processor, implements the steps of the wafer three-dimensional metrology data analysis method of any one of claims 1 to 11.

Description

Wafer three-dimensional measurement data analysis method and device, equipment and storage medium Technical Field The present application relates to the field of semiconductor manufacturing technology, and in particular, to a wafer three-dimensional measurement data analysis method, a wafer three-dimensional measurement data analysis system, an electronic device, a computer readable storage medium, and a computer program product. Background In the field of wafer manufacturing and inspection, three-dimensional measurement and analysis of interconnect structures on wafers is a key element to ensure package quality. The related data has the characteristics of multiple dimensions and multiple dimensions, and concretely comprises the size of a single interconnection structure, the size distribution of all interconnection structures in a single Die and the macroscopic distribution of Die good and bad on a whole wafer. Currently, mainstream data analysis systems in the industry typically present and count the complex multidimensional data described above in the form of two-dimensional tables, simple statistical graphs (e.g., red-green graphs), and the like. The traditional method has the obvious defects that firstly, the table data is not visual enough, the space distribution rule and microscopic abnormality are difficult to capture quickly and vividly, and secondly, a simple statistical chart can only provide the qualification/failure information of the Die level, but cannot deeply reveal the specific technological condition of each interconnection structure in the Die, and a large amount of valuable microscopic three-dimensional morphology information is annihilated. These severely restrict the depth and efficiency of the process defect diagnosis, resulting in prolonged process debugging period and difficult yield improvement. Disclosure of Invention In view of the foregoing drawbacks of the related art, an object of the present application is to disclose a wafer three-dimensional metrology data analysis method, a wafer three-dimensional metrology data analysis system, an electronic device, a computer-readable storage medium, and a computer program product, which solve the problems of the related art. The application discloses a wafer three-dimensional measurement data analysis method, which comprises the following steps: Acquiring three-dimensional morphology data of each interconnection structure in a wafer; Extracting at least one three-dimensional morphological characteristic parameter of each interconnection structure based on three-dimensional morphological data of each interconnection structure, generating a three-dimensional structure model corresponding to each interconnection structure, and generating an interconnection structure level view based on the three-dimensional structure model; according to a preset Die dividing rule, counting three-dimensional morphological feature parameters of a plurality of interconnection structures positioned in the same Die region to obtain Die level statistics, and generating a Die level view based on the Die level statistics; generating a wafer level view based on the Die level statistic; And establishing a hierarchical association structure among the interconnection structure level, the Die level and the wafer level, and realizing linkage display of different hierarchical views based on the hierarchical association structure. In some embodiments of the present application, the three-dimensional topography data comprises three-dimensional point cloud data, and the step of generating a three-dimensional structure model corresponding to each interconnection structure comprises extracting at least one three-dimensional topography characteristic parameter of each interconnection structure based on the three-dimensional point cloud data, and rendering the three-dimensional point cloud data of the interconnection structure to generate an interactable interconnection structure geometry model. In some embodiments of the application, at least one of rotating or scaling the interconnect structure geometry model in response to a perspective operation on the interconnect structure geometry model, mapping pixel coordinates of the drawn line segments to a three-dimensional point cloud space in response to a line drawing operation performed on the interconnect structure geometry model, and calculating geometric parameters based on the mapping results, and synchronously displaying camera shots of the interconnect structure for comparative analysis with the interconnect structure geometry model is performed. In some embodiments of the present application, the step of mapping the pixel coordinates of the drawn line segment to the three-dimensional point cloud space includes recording the screen pixel coordinates of the start point and the end point of the line segment, calculating the three-dimensional space ray corresponding to the screen coordinates by inverse transformation based o