CN-121982982-A - Gate driving circuit

CN121982982ACN 121982982 ACN121982982 ACN 121982982ACN-121982982-A

Abstract

The application belongs to the technical field of display driving, and particularly relates to a gate driving circuit, which comprises N cascaded gate driving modules, wherein the nth-stage gate driving module comprises a pre-charging unit, a stage transmission output unit, a local brushing control unit and a driving output unit, wherein the pre-charging unit is configured to pre-charge a pre-charging control node, the stage transmission output unit is configured to output a stage transmission signal of a current stage, the local brushing control unit is configured to acquire a refreshing state of the current stage according to a time sequence relation between a first control signal and a previous stage transmission signal in a local refreshing mode, the pre-charging control node is controlled to be conducted or disconnected with the driving control node according to the refreshing state, and the driving output unit is configured to output a gate driving signal of the current stage.

Inventors

LAN TIAN
XU PEI

Assignees

惠科股份有限公司

Dates

Publication Date: 20260505
Application Date: 20260408

Claims (10)

1. A gate driving circuit comprising N cascaded gate driving modules, wherein an nth stage gate driving module comprises: The precharge unit is connected with the precharge control node of the current stage and is configured to precharge the precharge control node through the level transmission signal of the n-j-th stage grid driving module; The stage transmission output unit is connected with the pre-charge control node and is configured to output a stage transmission signal of the current stage under the control of the voltage on the pre-charge control node; The local brush control unit is connected with the pre-charge control node, the current-stage driving control node, the first control signal end and the previous-stage transmission output end and is configured to acquire a current-row refreshing state according to a time sequence relation between a first control signal and a previous-stage transmission signal in a local refreshing mode, and control the pre-charge control node to be connected with or disconnected from the driving control node according to the refreshing state, wherein the refreshing state comprises a refreshing row and a non-refreshing row; and the driving output unit is connected with the driving control node and is configured to output a gate driving signal of the current stage under the control of the voltage on the driving control node.
2. The gate driving circuit according to claim 1, wherein the partial brush control unit includes: A state monitoring subunit, connected to the first control signal end, the previous-stage transmission output end and a state node, configured to respond to the level states of the first control signal and the previous-stage transmission signal, and form a potential corresponding to the current-stage refresh state on the state node; And the gating switch subunit is connected with the state node, the pre-charge control node and the driving control node and is configured to be controlled by the electric potential on the state node so as to switch on or off the electric connection between the pre-charge control node and the driving control node.
3. The gate drive circuit according to claim 2, wherein the partial brush control unit further comprises: An auxiliary pull-up subunit connected to the state node and the drive control node and configured to be controlled by a potential on the state node to precharge the drive control node.
4. The gate drive circuit of claim 2, wherein the state monitoring subunit comprises: and the control end of the first transistor is connected with the level transmission output end of the n-k level grid driving module, the first end of the first transistor is connected with the first control signal end, and the second end of the first transistor is connected with the state node.
5. The gate drive circuit of claim 4, wherein the state monitoring subunit further comprises: The first end of the first capacitor is connected with the state node, and the second end of the first capacitor is connected with the driving control node; Or/and, a second transistor, wherein the control end of the second transistor is connected with the reset signal end or the level transmission output end of the n+i level gate driving module, the first end of the second transistor is connected with the state node, and the second end of the second transistor is connected with the low level end.
6. The gate drive circuit of claim 5, wherein the gate switch subunit comprises: and a third transistor, a control terminal of the third transistor being coupled to the state node, a first terminal of the third transistor being coupled to the precharge control node, and a second terminal of the third transistor being coupled to the drive control node.
7. The gate drive circuit of claim 6, wherein the gating switch subunit further comprises: And the control end of the fourth transistor is connected with the second control signal end, the first end of the fourth transistor is connected with the first end of the third transistor, and the second end of the fourth transistor is connected with the second end of the third transistor.
8. The gate drive circuit of claim 3, wherein the auxiliary pull-up subunit comprises: a fifth transistor, wherein the control end of the fifth transistor is connected with the state node, and the first end of the fifth transistor is connected with the level transmission output end of the n-j gate driving module; And the control end of the sixth transistor is connected with the second end of the fifth transistor, the first end of the sixth transistor is connected with the first end of the fifth transistor, and the second end of the sixth transistor is connected with the driving control node.
9. The gate driving circuit according to claim 1, wherein, The precharge unit comprises a seventh transistor, the control end of the seventh transistor is connected with the level transmission output end of the n-j level grid driving module, the first end of the seventh transistor is connected with the control end of the seventh transistor, and the second end of the seventh transistor is connected with the precharge control node; Or/and, the stage transmission unit comprises an eighth transistor and a second capacitor, wherein the control end of the eighth transistor is connected with the pre-charge control node, the first end of the eighth transistor is connected with the clock signal end of the current stage, and the second end of the eighth transistor is used as the stage transmission end of the current stage; Or/and, the driving output unit comprises a ninth transistor and a third capacitor, wherein the control end of the ninth transistor is connected with the driving control node, the first end of the ninth transistor is connected with the clock signal end of the current stage, the second end of the ninth transistor is used as the driving output end of the current stage, the first end of the third capacitor is connected with the control end of the ninth transistor, and the second end of the third capacitor is connected with the second end of the ninth transistor.
10. The gate drive circuit of claim 1, wherein the nth stage gate drive module further comprises a pull-down unit configured to pull down the precharge control node and the drive output; wherein the pull-down unit includes: A tenth transistor, wherein the control end of the tenth transistor is connected with the level transmission output end of the n+i level grid electrode driving module, the first end of the tenth transistor is connected with the driving output end of the driving output unit, and the second end of the tenth transistor is connected with the low level end; And an eleventh transistor, wherein the control terminal of the eleventh transistor is connected with the control terminal of the tenth transistor, the first terminal of the eleventh transistor is connected with the precharge control node, and the second terminal of the eleventh transistor is connected with the low level terminal.

Description

Gate driving circuit Technical Field The disclosure belongs to the technical field of display driving, and particularly relates to a gate driving circuit. Background With the increasing demands of display devices for large size, high resolution and low power consumption, progressive scanning using GOA (GATE DRIVER on Array) technology has become a mainstream driving method. In order to reduce the power consumption of the display device, a display mode of partial refresh is proposed, namely, only scanning is performed in a picture update area instead of refreshing the whole screen, thereby remarkably reducing the power consumption of GOA and driving IC. However, in the GOA circuit of the current local refresh, under the multi-CK architecture, due to the longer time sequence overlapping area between adjacent stage signals, erroneous output is usually generated at the edge of the refresh area, resulting in abnormal display, and the reliability of the local refresh is reduced. Therefore, how to improve the false output of the local refresh edge position is a current urgent problem to be solved. Disclosure of Invention The embodiment of the application provides a grid driving circuit, which is characterized in that a local brush control unit is arranged between a precharge unit and a driving output unit, and whether the driving output unit outputs a grid driving signal is dynamically controlled according to whether the current line is a refreshing line, so that the problem of false output of the local refreshing edge position is solved. The application provides a grid driving circuit which comprises N cascaded grid driving modules, an nth-stage grid driving module, a stage transmission unit and a local brushing control unit, wherein the nth-stage grid driving module is connected with a current-stage pre-charging control node and is configured to pre-charge the pre-charging control node through a stage transmission signal of the nth-j-stage grid driving module, the stage transmission unit is connected with the pre-charging control node and is configured to output the stage transmission signal of the current-stage under the control of voltage on the pre-charging control node, the local brushing control unit is connected with the pre-charging control node, a current-stage driving control node, a first control signal end and a previous-stage transmission output end and is configured to acquire a current-stage refreshing state according to a time sequence relation between the first control signal and the previous-stage transmission signal in a local refreshing mode, and is configured to control the pre-charging control node to be conducted or disconnected with the driving control node according to the refreshing state, the refreshing state comprises a refreshing line and a non-refreshing line, and the driving output unit is connected with the driving control node and is configured to output the driving signal of the current-stage grid under the control of the voltage on the driving control node. Optionally, the local brush control unit comprises a state monitoring subunit, a gating switch subunit and a gating control subunit, wherein the state monitoring subunit is connected with the first control signal end, the previous-stage transmission output end and the state node and is configured to respond to the level states of the first control signal and the previous-stage transmission signal to form a potential corresponding to the current-stage refreshing state on the state node, and the gating switch subunit is connected with the state node, the pre-charging control node and the driving control node and is configured to be controlled by the potential on the state node so as to switch on or off the electric connection between the pre-charging control node and the driving control node. Optionally, the office brush control unit further comprises an auxiliary pull-up subunit connected with the state node and the drive control node and configured to be controlled by the potential on the state node so as to precharge the drive control node. Optionally, the state monitoring subunit comprises a first transistor, wherein a control end of the first transistor is connected with a level transmission output end of the n-k level grid driving module, a first end of the first transistor is connected with the first control signal end, and a second end of the first transistor is connected with the state node. Optionally, the state monitoring subunit further comprises a first capacitor, a second transistor and a third transistor, wherein a first end of the first capacitor is connected with the state node, a second end of the first capacitor is connected with the driving control node, a control end of the third transistor is connected with a reset signal end or a level transmission output end of the n+i-th level grid driving module, a first end of the third transistor is connected with the state node, and a second end of the third transis