CN-121983101-A - Flash memory horizontal direction multidimensional weight control circuit and method based on convolution operation and flash memory

CN121983101ACN 121983101 ACN121983101 ACN 121983101ACN-121983101-A

Abstract

The invention provides a multi-dimensional weight control circuit and method in the horizontal direction of a flash memory based on convolution operation, and a flash memory, comprising a word line multiplexing transmission module, a flash memory array module and a control module, wherein the word line multiplexing transmission module is connected with the flash memory array module and generates word line selection signals to select word lines and apply voltages in the horizontal direction to selected blocks; the system comprises a word line multiplexing transmission module, a block selection module, a latch module and a control module, wherein the word line multiplexing transmission module is connected with the block selection module, and generates a block channel control signal to control the word line multiplexing transmission module. By adding the latch module and optimizing the functions of the block selection module on the basis of the existing flash memory structure, the word line voltage of the current block is kept by the latch module while the chip area and the power consumption are not remarkably increased, and then the voltage setting of the blocks is sequentially carried out to realize the flexible setting of the multidimensional weight in the horizontal direction, so that the problem of how to flexibly adjust the multidimensional weight in the horizontal direction of the flash memory while the chip area and the power consumption are not remarkably increased is solved.

Inventors

NI LIQIANG
GUO XIAOJIANG
SUN PENG
TANG QIANG

Assignees

至讯创新科技(无锡)有限公司

Dates

Publication Date: 20260505
Application Date: 20260407

Claims (10)

1. The utility model provides a flash memory horizontal direction multidimensional weight control circuit based on convolution operation which characterized in that includes: A flash memory array module; the word line multiplexing transmission module is used for generating word line selection signals to select word lines in the flash memory array module and applying voltage in the horizontal direction to selected blocks in the flash memory array module, wherein the weights of the blocks are different according to different applied voltages; The block selection module is used for generating a block access control signal according to the block selection signal so as to control the word line multiplexing transmission module to generate a word line selection signal; the latch module is connected with the block selection module and is used for registering an enabling signal of the voltage of the block in the flash memory array module in the horizontal direction.
2. The convolution operation based multi-dimensional weight control circuit of flash memory horizontal direction according to claim 1, wherein said latch module is further configured to generate a latch signal according to a block selection signal, said block selection module is configured to generate a block path control signal according to the block selection signal, the latch signal and a mode enable signal.
3. The flash memory horizontal direction multidimensional weight control circuit based on convolution operation according to claim 2, wherein the block selection module comprises an and gate, a not gate, an or gate and a first horizontal shifter; The two input ends of the AND gate are respectively connected with a latch signal and a mode enabling signal, the output end of the AND gate is connected with one input end of the OR gate, the input end of the NOT gate is connected with a block selection signal, the output end of the NOT gate is connected with the other input end of the OR gate, the output end of the OR gate is connected with the input end of the first horizontal shifter, the output end of the first horizontal shifter outputs a first block passage control signal, and the block passage control signal comprises the first block passage control signal.
4. The flash memory horizontal direction multidimensional weight control circuit based on convolution operation as recited in claim 3, wherein the block selection module further comprises a second horizontal shifter, wherein an input end of the second horizontal shifter is connected with a block selection signal, an output end of the second horizontal shifter outputs a second block path control signal, and the block path control signal further comprises the second block path control signal.
5. The convolution operation based multi-dimensional weight control circuit of flash memory horizontal direction according to claim 4, wherein the first horizontal shifter is connected to a first power supply voltage, the second horizontal shifter is connected to a second power supply voltage, and the first power supply voltage is lower than the second power supply voltage.
6. The multi-dimensional weight control circuit for the horizontal direction of the flash memory based on convolution operation according to claim 2, wherein the latch module comprises a latch, wherein the input end of the latch is connected with a block selection signal, and the output end of the latch outputs a latch signal.
7. The convolutional operation-based multi-dimensional weight control circuit of flash memory horizontal direction according to claim 1, wherein the word line multiplexing transmission module is connected with various bias signals, selects corresponding bias signals according to block access control signals to generate corresponding word line selection signals, selects corresponding word lines in the flash memory array module according to the generated word line selection signals, and applies voltage in horizontal direction to the selected blocks in the flash memory array module.
8. The method for controlling the multi-dimensional weight of the horizontal direction of the flash memory based on the convolution operation is applied to the multi-dimensional weight control circuit of the horizontal direction of the flash memory based on the convolution operation as claimed in any one of claims 1 to 7, and is characterized in that the method for controlling the multi-dimensional weight of the horizontal direction of the flash memory based on the convolution operation comprises the following steps: providing a block select signal; the block selection module generates a block access control signal according to the block selection signal; The word line multiplexing transmission module generates a word line selection signal according to the block access control signal to select word lines in the flash memory array module and applies voltage in the horizontal direction to the selected blocks in the flash memory array module, wherein the weights of the blocks are different according to different applied voltages; The latch module registers an enable signal of a voltage of a horizontal direction of a block in the flash memory array module.
9. The method for controlling the multi-dimensional weight of the flash memory in the horizontal direction based on the convolution operation according to claim 8, wherein the method for controlling the multi-dimensional weight of the flash memory in the horizontal direction based on the convolution operation further comprises: repeating the steps until the application of the voltages in the horizontal direction to all the blocks in the flash memory array module is completed, wherein the voltages applied to all the blocks are different.
10. A flash memory, comprising the multi-dimensional weight control circuit of claim 1 to 7.

Description

Flash memory horizontal direction multidimensional weight control circuit and method based on convolution operation and flash memory Technical Field The invention relates to the technical field of circuit design, in particular to a flash memory horizontal direction multidimensional weight control circuit and method based on convolution operation and a flash memory. Background The convolution operation of flash Memory refers to a calculation mode of directly realizing convolution operation in a Memory unit by utilizing the physical characteristics of a flash Memory storage device, and belongs to a front application of ‌ integrated-in-Memory (CIM) technology. The method has the core ideas that the weight parameters of the neural network are stored in the flash memory unit, and the multiplication and addition operation (MAC) is completed by utilizing the ohm law and kirchhoff current law of an analog domain, so that the bottleneck of data carrying in the traditional von Neumann architecture is avoided, and the energy efficiency and the speed are obviously improved. At present, when flash convolution calculation is realized, a new function is generated based on a two-dimensional function. For NAND flash memory, there are two dimensions that are natural, namely the horizontal (X) direction and the vertical (Y) direction. Wherein the Y direction is related to the number of Bit Lines (BL), the information control of the naturally occurring dimension, the X direction is related to block (blk) selection, the bit lines corresponding to different blocks under the same plane are identical, and in order to realize the multidimensional weight of the X direction in convolution, different blocks need to be operated simultaneously, namely a so-called multi-blk operation. However, the existing flash multi-blk operation applies the same voltage to different blocks of the same Word Line (WL), i.e., the voltage of each block is the same, so the weight of the X direction cannot be flexibly adjusted, which limits the application of flash convolution calculation, and if the conventional flash multi-blk operation of CIM is to be implemented, it is necessary to use multiple control sources to implement voltage control at the same time, thus occupying a large amount of chip area and having high power consumption. Disclosure of Invention The invention aims to provide a convolution operation-based multi-dimensional weight control circuit and method for a horizontal direction of a flash memory and the flash memory, so as to at least solve the problem of flexibly adjusting the multi-dimensional weight of the horizontal direction of the flash memory without remarkably increasing the chip area and the power consumption. In order to solve the technical problems, the present invention provides a flash memory horizontal direction multidimensional weight control circuit based on convolution operation, comprising: A flash memory array module; the word line multiplexing transmission module is used for generating word line selection signals to select word lines in the flash memory array module and applying voltage in the horizontal direction to selected blocks in the flash memory array module, wherein the weights of the blocks are different according to different applied voltages; The block selection module is used for generating a block access control signal according to the block selection signal so as to control the word line multiplexing transmission module to generate a word line selection signal; the latch module is connected with the block selection module and is used for registering an enabling signal of the voltage of the block in the flash memory array module in the horizontal direction. Optionally, in the multi-dimensional weight control circuit in the horizontal direction of the flash memory based on convolution operation, the latch module is further configured to generate a latch signal according to a block selection signal, and the block selection module is configured to generate a block access control signal according to the block selection signal, the latch signal and a mode enable signal. Optionally, in the multi-dimensional weight control circuit in the horizontal direction of the flash memory based on convolution operation, the block selection module includes an and gate, an not gate, an or gate and a first horizontal shifter; The two input ends of the AND gate are respectively connected with a latch signal and a mode enabling signal, the output end of the AND gate is connected with one input end of the OR gate, the input end of the NOT gate is connected with a block selection signal, the output end of the NOT gate is connected with the other input end of the OR gate, the output end of the OR gate is connected with the input end of the first horizontal shifter, the output end of the first horizontal shifter outputs a first block passage control signal, and the block passage control signal comprises the first block passage contr