CN-121983104-A - Memory management method and memory device

CN121983104ACN 121983104 ACN121983104 ACN 121983104ACN-121983104-A

Abstract

The invention provides a memory management method and a memory device. The method comprises the steps of responding to a target operation event, determining target management areas of a plurality of management areas, wherein the plurality of management areas are vertically distributed in a memory module according to respective electrical characteristics, the plurality of management areas comprise a bonding interface area, a bonding transition area, an etching variation area and a central stable area, the bonding interface area, the bonding transition area, the etching variation area and the central stable area correspond to different types of process defects respectively, the target operation event indicates to execute target operation on the target word line, determining a target management table corresponding to the target management areas from a plurality of management tables, adjusting reference electrical parameters according to the target management tables, and executing target operation on the target word line according to the adjusted reference electrical parameters. Thus, the operation performance and/or the operation stability of the storage device can be improved.

Inventors

CHAI WENJUN
ZHU QIAO

Assignees

合肥开梦科技有限责任公司

Dates

Publication Date: 20260505
Application Date: 20251014

Claims (6)

1. A memory management method applied to a storage device including a memory module including a plurality of word lines, the memory management method comprising: Determining a target management area of a plurality of management areas of target word lines in response to a target operation event, wherein the plurality of management areas are vertically distributed in the memory module according to respective electrical characteristics, the plurality of management areas comprise a bonding interface area, a bonding transition area, an etching variation area and a central stable area, the bonding interface area, the bonding transition area, the etching variation area and the central stable area respectively correspond to different types of process defects, and the target operation event indicates to execute target operation on the target word lines; Determining a target management table corresponding to the target management area from a plurality of management tables; adjusting a reference electrical parameter according to the target management table, and And executing the target operation on the target word line according to the adjusted reference electrical parameter.
2. The memory management method of claim 1, wherein the word lines in the bonding interface region have more significant interface bonding process defects than other word lines, Word lines located in the etch variation region have more significant plasma etch process defects than other word lines, The word line in the central stable region has the most stable electrical characteristics compared with other word lines, and The electrical characteristics of the word lines in the bond transition region vary progressively with word line position.
3. The memory management method of claim 2, wherein if the target management area belongs to the bonding interface area, the target management table is used to compensate for the interface bonding process defect for the target word line during the execution of the target operation on the target word line, If the target management area belongs to the etching variation area, the target management table is used for compensating the plasma etching process defect of the target word line during the process of executing the target operation on the target word line, If the target management area belongs to the central stable area, the target management table is used for compensating the most stable electrical characteristic of the target word line during the target operation of the target word line, and If the target management area belongs to the bonding transition area, the target management table is used for performing corresponding electrical compensation for the word line position where the target word line is located during the execution of the target operation on the target word line.
4. The memory management method according to claim 1, wherein the plurality of management areas includes a virtual word line area interposed between two specific types of management areas, The word lines located in the dummy word line region are not used to store user data, and voltages applied to the word lines in the dummy word line region are changed in conjunction with operation voltages applied to adjacent management regions.
5. The memory management method of claim 4, wherein the voltage applied to the word lines in the virtual word line region varies in conjunction with the operating voltage applied to the adjacent management region comprises: When a voltage applied to the adjacent management region is changed, the change may be reflected into the virtual word line region such that a voltage subsequently applied to the virtual word line region is also correspondingly changed.
6. A memory device, comprising: a connection interface for connecting to a host system; Memory module, and A memory controller connected to the connection interface and the memory module, Wherein the memory module comprises a plurality of word lines and the memory controller is to perform the memory management method of any one of claims 1 to 5.

Description

Memory management method and memory device The application relates to a Chinese patent application (application day: 2025, 10, 14 days, title of application: memory management method and storage device) with application number 202511461658.7. Technical Field The present invention relates to the field of memory technologies, and in particular, to a memory management method and a memory device. Background Flash memory (NAND FLASH) is used as a currently mainstream nonvolatile storage medium, and is widely applied to Solid State Disk (SSD), embedded multimedia controller (eMMC), universal flash memory storage (UFS), U disk and various portable multimedia devices by virtue of the advantages of high read-write speed, good anti-seismic performance, low power consumption and the like. In recent years, with the continuous evolution of semiconductor manufacturing processes, particularly the rapid development of 3D NAND technology, the memory density of NAND FLASH is continuously improved, and the number of layers has rapidly expanded from the early 32 layers and 64 layers to 128 layers and above which are currently mainstream. In a high stacked layer 3D NAND architecture, due to device structure complexity and process limitations, the coupling effect between Word Lines (WL) is significantly enhanced, especially at the physical edge regions of the array (i.e., the top-most and bottom-most Word lines), with the tendency of non-linear growth of inter-Word Line interference (Wordline Disturb). This disturb effect directly affects the charge stability of the memory cell, which in turn results in a significant increase in the original bit error rate (Raw Bit Error Rate, RBER). Disclosure of Invention The invention provides a memory management method and a memory device, which can improve the problems and improve the operation performance and/or the operation stability of the memory device. An embodiment of the invention provides a memory management method for a memory device, the memory device comprising a memory module, the memory module comprising a plurality of word lines, and the memory management method comprising detecting a target operation event, wherein the target operation event indicates to perform a target operation on a target word line of the plurality of word lines, determining a target management area of a plurality of management areas in response to the target operation event, wherein the plurality of management areas are vertically distributed in the memory module according to respective electrical characteristics, determining a target management table corresponding to the target management area from a plurality of management tables, adjusting a reference electrical parameter according to the target management table, and performing the target operation on the target word line according to the adjusted reference electrical parameter. The embodiment of the invention further provides a storage device, which comprises a connection interface, a memory module and a memory controller. The connection interface is used for connecting to a host system. The memory controller is connected to the connection interface and the memory module. The memory module includes a plurality of word lines, and the memory controller is configured to detect a target operation event, wherein the target operation event indicates a target operation to be performed on a target word line of the plurality of word lines, determine a target management area of a plurality of management areas in response to the target operation event, wherein the plurality of management areas are vertically distributed in the memory module according to respective electrical characteristics, determine a target management table corresponding to the target management area from a plurality of management tables, adjust a reference electrical parameter according to the target management table, and perform the target operation on the target word line according to the adjusted reference electrical parameter. Based on the above, after detecting a target operation event indicating that a target operation is performed on a target word line, a target management area in which the target word line is located among a plurality of management areas may be determined in response to the target operation event, and a target management table corresponding to the target management area may be determined. In particular, the plurality of management areas are vertically distributed in the memory module according to respective electrical characteristics. Thereafter, the reference electrical parameter may be adjusted according to the target management table, and the adjusted reference electrical parameter may be used to perform a target operation on the target word line. Thus, the operation performance and/or the operation stability of the storage device can be improved. Drawings FIG. 1 is a schematic diagram of a data storage system shown in accordance with an embodiment of the presen