CN-121983108-A - Memory testing method and electronic equipment

Abstract

The embodiment of the application provides a memory testing method and electronic equipment. The memory test method comprises the steps of storing a target signature file and a memory test script in a target test partition when equipment to be tested is in a factory test mode, writing or deleting a start test zone bit in a random access memory based on a trigger state of a preset combination key, detecting whether the start test zone bit exists in the random access memory or not in a starting self-test process of a basic input/output system, and controlling the equipment to be tested to start the target test partition to execute memory test operation if the start test zone bit exists in the random access memory, so that automatic test of a memory is realized, and the memory test efficiency is remarkably improved.

Inventors

• WEI WENXU

Assignees

• 深圳宝新创信息技术有限公司

Dates

Publication Date

20260505

Application Date

20260112

Claims (10)

1. 1. A memory testing method, comprising: when the equipment to be tested is in a factory test mode, storing a target signature file and a memory test script in a target test partition; Writing or deleting a start test flag bit in the random access memory based on a trigger state of a preset combination key; In the process of starting up self-checking of the basic input/output system, detecting whether the starting-up test flag bit exists in the random access memory; and if the starting test flag bit exists in the random access memory, controlling the equipment to be tested to start the target test partition so as to execute memory test operation.
2. 2. The memory testing method according to claim 1, wherein storing the target signature file and the memory test script in the target test partition comprises: Dividing a region from a storage medium of the device to be tested as the target test partition in the mirror image manufacturing stage of the device to be tested; and storing the target signature file and the memory test script in the target test partition according to a preset directory structure.
3. 3. The memory testing method according to claim 1, wherein the preset combination key comprises a first combination key and a second combination key; the writing or deleting the start test flag bit in the random access memory based on the triggering state of the preset combination key comprises the following steps: If the first combination key is detected to be triggered, writing the start test flag bit into the random access memory; and deleting the start test flag bit in the random access memory if the second combination key is detected to be triggered.
4. 4. The memory testing method according to claim 1, wherein if the start test flag bit exists in the random access memory, controlling the device under test to start the target test partition to perform a memory testing operation includes: If the starting test flag bit exists in the random access memory, controlling the equipment to be tested to start a command line environment of an extensible firmware interface in the target signature file from a target test partition; running the memory test script based on a command line environment of the extensible firmware interface; And calling a memory test tool in the target signature file based on the memory test script, and executing memory test operation.
5. 5. The memory testing method of claim 1, wherein prior to storing the target signature file and the memory test script within the target test partition when the device under test is in the factory test mode, the method further comprises: Performing security start certificate signature processing on a command line environment of an extensible firmware interface and a memory test tool to obtain a target signature file containing the command line environment of the extensible firmware interface and the memory test tool; and writing the file name information of the memory test tool into the memory test script.
6. 6. The memory testing method of claim 1, further comprising: In the process of starting up self-checking of the basic input/output system, if a preset shortcut key is detected to be triggered, deleting the starting test flag bit in the random access memory, and terminating the memory test operation; And the detection priority of the preset shortcut key is higher than that of the start test flag bit.
7. 7. The memory testing method of claim 3, further comprising: Detecting a triggering state of the second combination key when the equipment to be tested is in a non-shutdown state; and if the second combination key is detected to be triggered, deleting the start test flag bit in the random access memory and terminating the memory test operation.
8. 8. The memory testing method of claim 1, wherein the target test partition is in FAT32 format.
9. 9. The memory testing method of any one of claims 1 to 8, further comprising: after the memory test is completed, collecting a memory test result output by a memory test tool; And storing the memory test result in the target test partition in the form of a memory test log.
10. 10. An electronic device comprising a memory and a processor, the processor being communicatively coupled to the memory, the memory storing computer program instructions that, when invoked by the processor, cause the processor to perform the memory testing method of any one of claims 1-8.

Description

Memory testing method and electronic equipment Technical Field The present application relates to the field of electronic technologies, and in particular, to a memory testing method and an electronic device. Background With the rapid development of the computer hardware industry in recent years, a memory test scheme based on a USB flash disk is widely used in a batch test scene of a production line because of flexible deployment and capability of adapting to various PC devices. However, taking batch memory testing of PC devices, notebook computers and other devices as an example, the conventional memory testing scheme relies on externally-connected deployment of a testing tool by a usb, and needs to enter a BIOS Setup interface closing security Boot (security Boot) option through a manual operation shortcut key, then enter a Boot Manager to select the usb for starting, and finally manually trigger the operation of the memory testing tool in the UEFI Shell. In a batch memory test scene, a large number of U disks are required to be prepared, copying and deployment of a UEFI environment and a memory test tool are required to be completed in advance, the earlier preparation workload is complicated, the hardware cost is high, if a single U disk is adopted for testing one by one, a subsequent test log cannot be stored when the U disk is pulled out after the test is completed, and the quality tracing requirement of batch test is difficult to meet. Moreover, closing the Secure Boot option directly damages the security protection mechanism in the system startup stage, and the UEFI Shell and the test tool EFI file which are not signed by the security startup certificate are easily intercepted by the device security policy and cannot normally run. Disclosure of Invention The embodiment of the application provides a memory testing method and electronic equipment, which aim to solve at least part of defects existing in a memory testing mode of the existing electronic equipment. In a first aspect, an embodiment of the present application provides a memory testing method. The memory test method comprises the steps of storing a target signature file and a memory test script in a target test partition when equipment to be tested is in a factory test mode, writing or deleting a start test zone bit in a random access memory based on a trigger state of a preset combination key, detecting whether the start test zone bit exists in the random access memory or not in a starting self-test process of a basic input/output system, and controlling the equipment to be tested to start the target test partition if the start test zone bit exists in the random access memory so as to execute memory test operation. In a second aspect, an embodiment of the present application provides an electronic device. The electronic device comprises a memory and a processor, wherein the processor is in communication connection with the memory, the memory stores computer program instructions, and the computer program instructions, when called by the processor, cause the processor to execute the memory test method. The memory testing method provided by the embodiment of the application has the beneficial effects that the target signature file and the memory testing script are stored in the target testing partition when the equipment to be tested is in the factory testing mode, and the writing and deleting of the starting testing marker bit in the random access memory are controlled based on the triggering state of the preset combination key, so that the automatic triggering of the memory testing process in the BIOS starting self-checking stage is realized, the memory testing efficiency is obviously improved, and the technical defects that the traditional scheme depends on external deployment of a U disk and the manual operation step is complicated are effectively avoided. In addition, the application stores the target signature file and the built-in target test partition, does not need to use external storage equipment or close a safety starting mechanism, can meet the high-efficiency memory test requirement of batch equipment, and can ensure the safety of the test process. Drawings One or more embodiments are illustrated by way of example and not limitation in the figures of the accompanying drawings, in which like references indicate similar elements, and in which the figures of the drawings are not to be taken in a limiting sense, unless otherwise indicated. FIG. 1 is a schematic diagram of a memory testing method according to an embodiment of the present application; FIG. 2 is a schematic diagram of a storage target signature file and a memory test script according to an embodiment of the present application; FIG. 3 is a schematic diagram of writing or deleting a start test flag bit according to an embodiment of the present application; FIG. 4 is a schematic diagram of a boot target test partition according to an embodiment of the present application; F