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CN-121983393-A - Capacitive high-voltage insulating bus and manufacturing method thereof

CN121983393ACN 121983393 ACN121983393 ACN 121983393ACN-121983393-A

Abstract

The invention relates to a capacitive high-voltage insulating bus and a manufacturing method thereof, which belong to the technical field of high-voltage insulating buses and comprise the following steps of S1, conductor pretreatment, S2, multilayer material coextrusion, S3, synchronous crosslinking and forming, wherein the surface of a central conductor is subjected to oil removal, oxidation layer removal and sand blasting roughening treatment, the preheated central conductor is pulled through a multilayer coextrusion head at a constant speed, the multilayer blank is immediately led into a closed synchronous crosslinking forming pipeline, and S4, post-treatment and assembly are performed, namely appearance detection, partial discharge test and pressure resistance test are performed on the crosslinked bus. According to the capacitive high-voltage insulating bus and the manufacturing method thereof, through designing the integrated composite capacitor structure consisting of the inner semiconductor layer, the stepped capacitor layer and the outer semiconductor layer, the electric potential between the high-voltage conductor and the grounded shell is linearly and uniformly distributed, the phenomenon of electric field concentration is thoroughly eliminated, and the long-term insulating service life and the operating voltage level are remarkably improved.

Inventors

  • CHEN PENG
  • JIANG CHUNFENG
  • DING YUN
  • XIE YUFENG

Assignees

  • 江苏超维电气科技有限公司

Dates

Publication Date
20260505
Application Date
20260204

Claims (10)

  1. 1. The manufacturing method of the capacitive high-voltage insulated bus is characterized by comprising the following steps of: S1, conductor pretreatment, namely carrying out oil removal, oxidation layer removal and sand blasting roughening treatment on the surface of a central conductor, and then preheating to 50-80 ℃; S2, carrying out multi-layer material coextrusion, namely drawing the preheated central conductor through a multi-layer coextrusion head at a constant speed, wherein the coextrusion head is coaxially provided with an inner semiconductor layer extrusion channel, at least two ladder capacitor layer extrusion channels and an outer semiconductor layer extrusion channel from inside to outside, and extruding the inner semiconductor material, at least two insulating materials with different dielectric constants and the outer semiconductor material which are in a molten state or an unvulcanized state respectively independently and accurately in a metering manner to form an inner semiconductor layer, a ladder capacitor layer and an outer semiconductor layer by coating on the central conductor in sequence to form a multi-layer blank; the thickness of each sub-layer in the stepped capacitance layer is controlled by adjusting the extrusion pressure and flow of each extrusion channel in real time, so that the ratio (d/epsilon) of the thickness (d) of each sub-layer to the dielectric constant (epsilon) of each sub-layer is equal; S3, synchronously crosslinking and forming, namely immediately introducing the multilayer blank into a closed synchronous crosslinking forming pipeline, wherein the pipeline is divided into three continuous temperature areas, the first temperature area is a low-temperature homogenizing area, the temperature is 90-110 ℃, so that each layer of material is further fused under pressure and interlayer bubbles are removed, the second temperature area is a high-temperature crosslinking area, the temperature is 160-200 ℃, the pressure is 1.5-3.0 MPa, synchronous crosslinking curing reaction of each layer of material is triggered in the area, the third temperature area is a constant-pressure cooling area, the temperature gradient is cooled to room temperature under the condition of maintaining pressure, and the section shape of the inner wall of the synchronous crosslinking forming pipeline is matched with the final outer diameter of a bus; And S4, post-processing and assembling, namely performing appearance detection, partial discharge test and withstand voltage test on the bus after the cross-linking is finished, tightly sleeving or spirally winding a grounding metal shielding layer on the surface of the outer semiconductor layer after the bus is qualified, and finally assembling the grounding metal shell.
  2. 2. The manufacturing method of the capacitive high-voltage insulating bus bar according to claim 1 is characterized in that the inner semiconductor material and the outer semiconductor material are conductive crosslinked polyethylene or conductive ethylene propylene rubber, and the insulating materials with at least two different dielectric constants are crosslinked polyethylene composite materials modified by adding nano silicon dioxide or barium titanate with different proportions or liquid silicone rubber with different formulas.
  3. 3. The method for manufacturing a capacitive high-voltage insulated bus according to claim 1, wherein before the conductor in S1 is pretreated, the central conductor is required to be processed into a hollow tubular structure, and an insulating coating is pre-applied on the inner wall of the central conductor to form an axial fluid cooling channel.
  4. 4. The method of manufacturing a capacitive high voltage insulated busbar according to claim 1, wherein the pulling speed of the central conductor in S2 is 0.5-2.0 m/min.
  5. 5. The method for manufacturing the capacitive high-voltage insulated bus according to claim 1, wherein the temperature of the S2 co-extrusion head is controlled to be 150-170 ℃ for the inner semiconductor layer channel, 130-190 ℃ for the stepped capacitance layer channel, and 150-170 ℃ for the outer semiconductor layer channel according to different materials.
  6. 6. The method for manufacturing a capacitive high-voltage insulation bus according to claim 1, wherein an online thickness measuring instrument and an online eccentricity detector are arranged at the outlet of the synchronous cross-linking forming pipeline in the step S4, and data are fed back in real time to adjust extrusion parameters and traction speed in the step S2 in a linkage manner.
  7. 7. A capacitive high-voltage insulated bus prepared by the method for manufacturing the capacitive high-voltage insulated bus according to any one of claims 1-6, which is characterized by comprising a central conductor, an inner semiconductor layer, an integrated stepped capacitance layer formed by at least two insulating sub-layers with gradually decreasing dielectric constant gradients, an outer semiconductor layer and a grounded metal shell, which are tightly combined from inside to outside; wherein, there is no physical seam and air gap between the inner part of the integral ladder capacitor layer and each interface.
  8. 8. The capacitive high-voltage insulating bus bar according to claim 7, wherein the stepped capacitive layer is composed of three insulating sub-layers, from inside to outside, having dielectric constants of ε 1, ε 2, ε 3, respectively, and satisfying ε 1> ε 2> ε 3, wherein ε 1 ranges from 3.8 to 4.2, ε 3 ranges from 2.3 to 2.6, and each layer thickness d1, d2, d3 satisfies d1/ε1=d2/ε2=d3/ε3.
  9. 9. The capacitive high-voltage insulating bus bar according to claim 7, wherein the central conductor is a hollow tube, an axial closed cooling medium channel is formed in the hollow tube, and an insulating coating is coated on the inner wall of the hollow tube.
  10. 10. A capacitive high voltage insulating busbar according to claim 7, characterised in that at the ends of the busbar the integral stepped capacitive layer is machined in a stress cone structure, the outer semiconducting layer extending over the stress cone surface and being in smooth transition with the wound insulating layer.

Description

Capacitive high-voltage insulating bus and manufacturing method thereof Technical Field The invention relates to the technical field of high-voltage insulated buses, in particular to a capacitive high-voltage insulated bus and a manufacturing method thereof. Background The high-voltage insulated bus is key equipment for transmitting large current in a power system, and is widely applied to occasions such as transformer substations, power plants, large industrial facilities and the like. With the continuous improvement of voltage class and transmission capacity, more stringent requirements are put on the insulation reliability, electric field uniformity and long-term operation stability of the bus bar. At present, the common high-voltage insulating bus mainly adopts the following technical schemes: Solid insulated bus-bar, the conductor is wrapped in the solid insulating layer usually by epoxy resin casting or silicone rubber vulcanization process. Its advantages are simple structure, high mechanical strength, and non-uniform electric field distribution, and high electric field concentration at conductor edge. In addition, the solid insulating layer has poor heat dissipation performance, and restricts the current carrying capacity of the bus. A Gas Insulated Bus (GIB) is formed by placing a conductor in a sealed metal housing and filling an insulating gas such as SF 6 under a certain pressure. Its advantages are uniform electric field distribution, high insulating performance and compact structure. However, SF 6 gas has a problem of greenhouse effect, environmental regulations are increasingly strict, and use thereof is limited. Meanwhile, the GIB requires a complicated sealing system and a pressure monitoring device, and is expensive in manufacturing cost and maintenance cost. In order to improve electric field distribution, a part of traditional capacitive voltage equalizing buses are provided with conductive or semiconductive layers in insulating layers to form a simple capacitive screen. However, the scheme has the inherent defects that firstly, the interface combination of a capacitive screen and a main insulating layer is not firm, air gaps or delamination is easy to generate under long-term thermal circulation to form a local discharge source, secondly, the matching property of each layer of capacitance is poor, the truly linear and ideal voltage gradient distribution cannot be realized, thirdly, the manufacturing process is complex, the concentricity and uniformity of a multi-layer structure are difficult to ensure, and the consistency of product quality is poor. Therefore, a new high-voltage insulated bus structure and a manufacturing method thereof are needed in the prior art, which can realize excellent electric field homogenization and have high reliability, environmental protection and process feasibility. Disclosure of Invention Aiming at the defects of the prior art, the invention provides a capacitive high-voltage insulated bus and a manufacturing method thereof, which have the advantages of uniform and linear electric field distribution, zero defect of an insulated interface, integrated structure, environmental protection, no SF 6, continuous and precise manufacturing process, high product consistency and reliability and the like, and effectively solve the comprehensive technical problems that the traditional solid insulated bus is easy to age in electric field concentration, the traditional capacitive voltage-sharing structure is poor in interface combination, easy to layer, the gas insulated bus is poor in environmental protection and high in cost, and the traditional manufacturing process is difficult to consider multi-layer structure, accurate capacitance gradient and perfect interface fusion. In order to achieve the above purpose, the present invention provides the following technical solutions: a manufacturing method of a capacitive high-voltage insulation bus comprises the following steps: S1, conductor pretreatment, namely carrying out oil removal, oxidation layer removal and sand blasting roughening treatment on the surface of a central conductor, and then preheating to 50-80 ℃; S2, carrying out multi-layer material coextrusion, namely drawing the preheated central conductor through a multi-layer coextrusion head at a constant speed, wherein the coextrusion head is coaxially provided with an inner semiconductor layer extrusion channel, at least two ladder capacitor layer extrusion channels and an outer semiconductor layer extrusion channel from inside to outside, and extruding the inner semiconductor material, at least two insulating materials with different dielectric constants and the outer semiconductor material which are in a molten state or an unvulcanized state respectively independently and accurately in a metering manner to form an inner semiconductor layer, a ladder capacitor layer and an outer semiconductor layer by coating on the central conductor in sequence to form a mu