CN-121984189-A - Power management system for optimizing battery charge and discharge

CN121984189ACN 121984189 ACN121984189 ACN 121984189ACN-121984189-A

Abstract

The invention discloses a power management system for optimizing battery charge and discharge, which comprises a voltage transformation main circuit, a current sampling circuit, a feedback loop module and a control logic module, wherein the voltage transformation main circuit is connected with a voltage source and supplies power to a battery and a system at an output end through a built-in switching tube combination circuit structure, the current sampling circuit is used for receiving inductance current in the voltage transformation main circuit and outputting a voltage signal, the feedback loop module is used for receiving the voltage signal of the current sampling circuit and sampling output voltage of the voltage transformation main circuit, generating two paths of duty ratio signals, outputting the two paths of duty ratio signals to the control logic module, converting the two paths of driving signals into four paths of driving signals, outputting the four paths of driving signals to switching tubes in the voltage transformation main circuit, and finishing driving and controlling of six switching tubes. The invention can not only work in the buck-boost fast charging mode for fast charging, but also work in the dual-output working mode for respectively and independently supplying power to the battery and the system, thereby saving the space area of the inductor under small-sized equipment and being beneficial to prolonging the service life of the battery.

Inventors

FANG ZHONGYUAN
LI XUANYE
Fan Wangchen
Tian Zekai
JIN GUIXIANG
SUN WEIFENG

Assignees

东南大学

Dates

Publication Date: 20260505
Application Date: 20251224

Claims (9)

1. A power management system for optimizing battery charge and discharge is characterized by comprising a main transformation circuit, a current sampling circuit, a feedback loop module and a control logic module, wherein the main transformation circuit is connected with a voltage source V in from the input end of the main transformation circuit, and forms an input side half bridge arm through a built-in combined circuit structure of a first NMOS switch tube Q 1 , a second NMOS switch tube Q 2 , a third NMOS switch tube Q 3 and a fourth NMOS switch tube Q 4 , so as to supply power to a battery at the output end; the current sampling circuit is used for receiving the inductance current I SENSE of the inductance L in the transformer main circuit and outputting a voltage signal after processing; The feedback loop module receives the voltage signal output by the current sampling circuit and the sampled output voltage of the voltage transformation main circuit, generates two paths of duty ratio signals D1 and D2 after processing and outputs the two paths of duty ratio signals to the control logic module, and the control logic module receives the two paths of duty ratio signals D1 and D2 and converts the two paths of duty ratio signals into four paths of driving signals which are respectively and correspondingly output to corresponding NMOS switching tubes in the voltage transformation main circuit to finish the driving and the control of the NMOS switching tubes.
2. The power management system for optimizing battery charge and discharge according to claim 1, wherein the transformation main circuit comprises a first NMOS switch Q 1 , a second NMOS switch Q 2 , a third NMOS switch Q 3 , a fourth NMOS switch Q 4 , a fifth NMOS switch Q 5 , an inductance L, a battery capacitor C BAT , a sixth NMOS switch Q 6 , an input capacitor C in , a first resistor R 1 , a second resistor R 2 , a third resistor R 3 , a fourth resistor R 4 , an output capacitor C OUT , and a resistor R L ; One end of the input capacitor C in is connected with the positive electrode of the voltage source V in and the drain electrode of the first NMOS switch tube Q 1 , the other end of the input capacitor C in is connected with one end of the equivalent resistor ESR, and the other end of the equivalent resistor ESR is connected with the negative electrode of the voltage source V in , The source of the second NMOS switch Q 2 , the source of the third NMOS switch Q 3 , one end of the battery capacitor C BAT , one end of the second resistor R 2 , One end of the output capacitor C OUT , one end of the resistor R L and one end of the fourth resistor R 4 are grounded, the source electrode of the first NMOS switch tube Q 1 is connected with the drain electrode of the second NMOS switch tube Q 2 , One end of the inductor L, the other end of the inductor L is connected with the source electrode of the fifth NMOS switch tube Q 5 , the source electrode of the fourth NMOS switch tube Q 4 and the drain electrode of the third NMOS switch tube Q 4 , the drain electrode of the fifth NMOS switch tube Q 5 is connected with the drain electrode of the sixth NMOS switch tube Q 6 , The other end of the output capacitor C OUT , the other end of the inductor L, one end of a third resistor R 3 , the other end of the third resistor R 3 is connected with the other end of a fourth resistor R 4 , a sampling output voltage VFB2 is output between the two ends, the drain electrode of a fourth NMOS switch tube Q 4 is connected with the other end of a battery capacitor C BAT , The other end of the first resistor R 1 is connected with the other end of the second resistor R 2 , and a sampling output voltage VFB1 is output between the other end of the first resistor R 1 and the source electrode of the sixth NMOS switch tube Q 6 ; The source electrode of the fourth NMOS switch tube Q 4 forms the positive electrode of the output end of the voltage transformation main circuit and is connected with the positive electrode of the battery, the drain electrode of the fifth NMOS switch tube Q 5 is used as another output and is connected with the positive electrode of the system load, the negative electrode of the voltage source V in , the source electrode of the second NMOS switch tube Q 2 and the source electrode of the third NMOS switch tube Q 3 are connected and are commonly connected with the reference ground, the reference ground is also the common negative electrode of the battery and the system load, and two ends of the battery capacitor C BAT and the output capacitor C OUT are respectively connected with the two ends of the battery and the system load in a butt joint mode.
3. The power management system for optimizing battery charge and discharge of claim 1, including a four-switch buck-boost mode and a single-inductor dual-output buck mode.
4. The power management system for optimizing battery charge and discharge of claim 3, wherein in the four-switch buck-boost mode, the feedback loop module comprises a first high-gain high-bandwidth operational amplifier EA1, a second high-gain high-bandwidth operational amplifier EA2, an adding module, a first comparator CMP1, a second comparator CMP2, and a transient response enhancing module; the negative phase input end of the first high-gain high-bandwidth operational amplifier EA1 is connected to a sampling output voltage VFB1 of the transformer main circuit, and the positive phase input end of the first high-gain high-bandwidth operational amplifier EA1 is connected to a preset first reference voltage The output end of the first high-gain high-bandwidth operational amplifier EA1 is connected with the non-inverting input end of the second high-gain high-bandwidth operational amplifier EA2 in a butt joint manner, and the first high-gain high-bandwidth operational amplifier EA1 is used for presetting a first reference voltage Signal compensation is carried out on the sampling output voltage VFB1 to generate a corresponding signal And output to the positive phase input end of the second high-gain high-bandwidth operational amplifier EA2, and the negative phase input end of the second high-gain high-bandwidth operational amplifier EA2 inputs the voltage signal output by the current sampling circuit The second high-gain high-bandwidth operational amplifier EA2 is used for outputting signals according to the signals For voltage signal Performing signal compensation, generating and outputting a VCA_boost signal; The output end of the second high-gain high-bandwidth operational amplifier EA2 is respectively connected with the positive phase input end of the first comparator CMP1 and one input end of the adding module in a butt joint mode, the VCA_boost signal output by the second high-gain high-bandwidth operational amplifier EA2 is respectively output to the first comparator CMP1 and the adding module, and the negative phase input end of the first comparator CMP1 inputs a preset sawtooth wave signal The other input end of the adding module is connected with a preset second reference voltage The output end of the adding module is connected with the negative phase input end of the second comparator CMP2 in a butt joint way, and the adding module aims at the VCA_boost signal and the preset second reference voltage Performing superposition to generate VCA_buck signal and outputting to the second comparator CMP2, wherein the negative phase input end of the second comparator CMP2 inputs a preset sawtooth wave signal ; For VCA_boost signal and preset sawtooth wave signal by the first comparator CMP1 Comparing, generating a duty ratio signal D1 and outputting to the control logic module, and comparing the VCA_buck signal with a preset sawtooth signal by a second comparator CMP2 Comparing, generating a duty ratio signal D2 and outputting the duty ratio signal D2 to a control logic module; For transient response enhancement modules, input voltage After passing through a high pass filter and The signals are subjected to weighted summation and are input to the negative phase input end of a second high-gain high-bandwidth operational amplifier EA 2; Load current Is converted into a voltage signal after being sampled and is connected with The signals are weighted and summed and input to the non-inverting input of the second high gain high bandwidth op amp EA 2.
5. The power management system for optimizing battery charging and discharging according to claim 4, wherein the four-switch buck-boost mode comprises three modes, the first NMOS switch tube Q 1 is conducted with the fourth NMOS switch tube Q 4 , the rest of the switch tubes are turned off, the topology works in a through mode, the first NMOS switch tube Q 1 is conducted with the third NMOS switch tube Q 3 , the rest of the switch tubes are turned off, the topology works in an energy storage mode, the second NMOS switch tube Q 2 is conducted with the fourth NMOS switch tube Q 4 , the rest of the switch tubes are turned off, and the topology works in a release mode.
6. The power management system for optimizing battery charge and discharge according to claim 3, wherein the feedback loop module comprises a third comparator CMP3, a fourth comparator CMP4, a common-mode loop compensation module and a differential-mode loop compensation module in a single-inductor dual-output buck mode, wherein the common-mode loop compensation module comprises a third high-gain high-bandwidth operational amplifier EA3, a fourth high-gain high-bandwidth operational amplifier EA4, and the differential-mode loop compensation module comprises a fifth high-gain high-bandwidth operational amplifier EA5 and a sixth high-gain high-bandwidth operational amplifier EA6; In the common-mode loop compensation module, the sampled output voltage VFB1 and the sampled output voltage VFB2 of the transformer main circuit are weighted and averaged and then input into the negative phase input end of the third high-gain high-bandwidth operational amplifier EA3, and the positive phase input end of the third high-gain high-bandwidth operational amplifier EA3 inputs a preset third reference voltage The output end of the third high-gain high-bandwidth operational amplifier EA3 is connected to the positive phase input end of the fourth high-gain high-bandwidth operational amplifier EA4, and the negative phase input end of the fourth high-gain high-bandwidth operational amplifier EA4 inputs the voltage signal output by the current sampling circuit The output end of the fourth high-gain high-bandwidth operational amplifier EA4 is connected to the positive phase input end of the third comparator CMP3, and the negative phase input end of the third comparator CMP3 inputs a preset sawtooth wave signal The output end of the third comparator CMP3 outputs a duty ratio signal D1 and outputs the duty ratio signal D1 to the control logic module; In the differential-mode loop compensation module, the sampling output voltage VFB1 and the sampling output voltage VFB2 of the voltage transformation main circuit are respectively output to the negative phase input end and the positive phase input end of a fifth high-gain high-bandwidth operational amplifier EA5, the output of the fifth high-gain high-bandwidth operational amplifier EA5 is connected to the positive phase input end of a sixth high-gain high-bandwidth operational amplifier EA6, and the negative phase input end of the sixth high-gain high-bandwidth operational amplifier EA6 inputs the voltage signal output by the current sampling circuit The output end of the sixth high-gain high-bandwidth operational amplifier EA6 is connected to the positive phase input end of the fourth comparator CMP4, and the negative phase input end of the fourth comparator CMP4 inputs a preset sawtooth wave signal The output terminal of the fourth comparator CMP4 outputs the duty ratio signal D2 to the control logic block.
7. The power management system for optimizing battery charge and discharge according to claim 6, wherein the single-inductor dual-output buck mode comprises three modes, a first NMOS switching tube Q 1 is conducted with a fifth NMOS switching tube Q 5 , the rest of switching tubes are turned off, the topology is operated in a through mode, a second NMOS switching tube Q 2 is conducted with a fourth NMOS switching tube Q 4 , the rest of switching tubes are turned off, the topology is operated in a battery release mode, the second NMOS switching tube Q 2 is conducted with a fifth NMOS switching tube Q 5 , the rest of switching tubes are turned off, and the topology is operated in a system release mode.
8. A power management system for optimizing battery charge and discharge as defined in claim 3, wherein the control logic module comprises a control signal generation circuit, a dead time and control circuit; The control signal generation circuit converts the duty ratio signals D1 and D2 into four paths of control signals, the number of dead time and the number of input ends of the control circuit correspond to the number of output ends of the control signal generation circuit, and each output end of the dead time and the control circuit is connected to the voltage transformation main circuit; Each output end of the control signal generating circuit is in butt joint with each input end of the dead time and control circuit, and each output end of the dead time and control circuit is in butt joint with a corresponding NMOS switch tube in the transformer main circuit respectively; in the single-inductor double-output buck mode, the driving signals of the output ends are output to the grids of the first NMOS switch tube Q 1 , the second NMOS switch tube Q 2 , the fourth NMOS switch tube Q 4 and the fifth NMOS switch tube Q 5 ; The dead time and control circuit comprises a delay module and a driving module, wherein each input end of the delay module forms each input end of the dead time and control circuit, each output end of the delay module is respectively connected with each input end of the driving module in a butt joint mode, and each output end of the driving module forms each output end of the dead time and control circuit.
9. The power management system for optimizing battery charge and discharge according to claim 3, wherein the input end of the current sampling circuit is connected to an inductor current I SENSE in the transformer main circuit, and the current between the half bridge arm at the input side and the inductor L is sampled as an inductor current I SENSE in a single-inductor double-output buck mode; The current sampling circuit performs scaling bias processing on the accessed inductance current I SENSE to obtain a voltage signal And output to a feedback loop module.

Description

Power management system for optimizing battery charge and discharge Technical Field The invention relates to the technical field of voltage transformation control, in particular to a power management system for optimizing battery charging and discharging. Background With the popularization of portable and wearable electronic devices such as smart phones, smart watches, smart rings, and the like, the requirements on a power management system are increasingly increased. These devices generally face two core challenges, namely, the internal physical space of the device is extremely limited, the traditional power supply scheme needs to be provided with independent inductance elements for different power supply rails, the external inductance occupies a large amount of precious area on a circuit board, the compactness of product design is severely restricted, and the service life of a battery is problematic. For devices where the battery is tightly packed and not easily replaced by the user, the end of battery life also means to a large extent the end of the device's useful life. In the design of a power management system, a traditional DC-DC converter mostly adopts a form of single-path input and single-path output, and when the system needs multiple paths of power sources, multiple independent inductors and circuit modules are often needed. However, the inductor has a large volume and high cost as an external component, and becomes an important bottleneck for limiting the overall miniaturization of the system. In recent years, research on single-inductor multi-output topologies has been receiving extensive attention. The topology realizes multiplexing output by sharing a single inductor in a time division multiplexing mode, and can remarkably reduce the number of external inductors, so that the area of a PCB (printed circuit board) and the volume of a system are saved, and the topology is particularly suitable for wearable devices such as intelligent watches, intelligent headphones, intelligent rings and the like. Meanwhile, as lithium batteries become a main energy source carrier for portable electronic devices, battery management is becoming more important. When the traditional battery management system is charged, the battery is connected with the system load in parallel, so that the battery is charged and discharged at the same time under partial scenes, the service life of the battery is influenced, and the problem of low energy utilization efficiency is possibly caused. How to reduce unnecessary charge and discharge loss of the battery while ensuring high-efficiency power supply and prolong the service lives of the battery and the whole machine becomes a difficult problem to be solved. In addition, the four-switch buck-boost topology has become an important architecture in the battery power supply scene due to the advantages of high efficiency, wide voltage input and output range and seamless switching of buck-boost. If the four-switch topology can be combined with a single-inductor multi-output architecture, more flexible battery and system power supply management can be realized, high-efficiency energy conversion can be realized in a limited space, and the method has important engineering application value and industrial prospect. Disclosure of Invention The invention aims to provide a power management system for optimizing battery charge and discharge, which has the basic concept that two advanced power topologies, namely a four-switch buck-boost converter and a single-inductor multi-output architecture, are subjected to deep fusion, and high-efficiency electric energy conversion, space saving and battery management optimization are realized in a unified circuit. The invention designs a power management system for optimizing battery charge and discharge, which comprises a transformation main circuit, a current sampling circuit, a feedback loop module and a control logic module, wherein the input end of the transformation main circuit is connected with a voltage source V in, and an input side half bridge arm is formed by a built-in combined circuit structure of a first NMOS switch tube Q 1, a second NMOS switch tube Q 2, a third NMOS switch tube Q 3 and a fourth NMOS switch tube Q 4 to supply power to a battery at an output end; the current sampling circuit is used for receiving the inductance current I SENSE of the inductance L in the transformer main circuit and outputting a voltage signal after processing; The feedback loop module receives the voltage signal output by the current sampling circuit and the sampled output voltage of the voltage transformation main circuit, generates two paths of duty ratio signals D1 and D2 after processing and outputs the two paths of duty ratio signals to the control logic module, and the control logic module receives the two paths of duty ratio signals D1 and D2 and converts the two paths of duty ratio signals into four paths of driving signals which are respectively