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CN-121984348-A - Slope compensation circuit with adjustable output voltage amplitude and DC-DC exchanger

CN121984348ACN 121984348 ACN121984348 ACN 121984348ACN-121984348-A

Abstract

The invention discloses a slope compensation circuit with an adjustable output voltage amplitude and a DC-DC (direct current-direct current) exchanger, wherein the slope compensation circuit comprises a transistor M1, a capacitor, a transistor M5 and a comparator, wherein a grid electrode of the transistor M1 is connected with an input signal, one end of the capacitor is grounded after being connected with a source electrode of the transistor M1, the other end of the capacitor is respectively connected with a drain electrode of the transistor M1 and a source electrode of the transistor M5, the drain electrode of the transistor M5 is connected with a current source generating circuit, the grid electrode of the transistor M5 is connected with an output end of the comparator, and positive and negative input ends of the comparator are correspondingly connected with a slope compensation voltage and a reference voltage VREF2. The invention solves the problem that the output amplitude of the slope compensation circuit in the prior art cannot be limited, and can meet the amplitude requirements of the DC-DC converter on the slope compensation voltage under different working conditions.

Inventors

  • TAO ZHIPING

Assignees

  • 上海奥简微电子科技有限公司

Dates

Publication Date
20260505
Application Date
20260210

Claims (9)

  1. 1. The slope compensation circuit with the adjustable output voltage amplitude is characterized by comprising a transistor M1, a capacitor, a transistor M5 and a comparator; The grid electrode of the transistor M1 is connected with an input signal, one end of the capacitor is grounded after being connected with the source electrode of the transistor M1, and the other end of the capacitor is respectively connected with the drain electrode of the transistor M1 and the source electrode of the transistor M5; The drain electrode of the transistor M5 is connected with the current source generating circuit, the grid electrode is connected with the output end of the comparator, and the positive and negative input ends of the comparator are correspondingly connected with the slope compensation voltage and the reference voltage VREF2.
  2. 2. The slope compensation circuit of claim 1, wherein the comparator is configured to output a logic high level for pulling the gate voltage of the transistor M5 high, causing M5 to turn on, when the slope compensation voltage is lower than the reference voltage VREF 2; When the slope compensation voltage is higher than the reference voltage VREF2, the comparator outputs a logic low level for pulling the gate voltage of the transistor M5 to a low level to turn off the transistor M5.
  3. 3. The slope compensation circuit of claim 2, wherein the slope compensation circuit is configured to adjust the magnitude of the slope compensation voltage by adjusting the magnitude of the reference voltage VREF 2.
  4. 4. The slope compensation circuit of claim 3, wherein the transistor M1 and the transistor M5 are both NMOS transistors.
  5. 5. The slope compensation circuit of claim 1, wherein the current source generation circuit comprises: A transistor M4, wherein a drain of the transistor M4 is connected to a drain of the transistor M5, and a source is connected to a voltage VCC; A transistor M3, wherein a gate of the transistor M3 is connected to a drain thereof and a gate of the transistor M4, and a source thereof is connected to a source of the transistor M4; a transistor M2, wherein a drain of the transistor M2 is connected to a drain of the transistor M3, and a source is grounded through a resistor; And an operational amplifier, wherein an output end of the operational amplifier is connected with a gate electrode of the transistor M2, one input end of the operational amplifier is connected to a reference voltage VREF1, and the other input end of the operational amplifier is connected between a source electrode of the transistor M2 and the resistor.
  6. 6. The slope compensation circuit of claim 5, wherein the operational amplifier has a positive input connected to the reference voltage VREF1 and a negative input connected between the source of the transistor M2 and the resistor.
  7. 7. The slope compensation circuit of claim 5, wherein the formula of the current I1 flowing to the transistor M5 is: wherein, R1 is the resistance value of the resistor, and VREF1 is the voltage value of the reference voltage VREF 1.
  8. 8. The slope compensation circuit of claim 5, wherein the transistor M4, the transistor M3, and the transistor M2 are PMOS transistors.
  9. 9. A DC-DC converter comprising a slope compensation circuit according to any of claims 1-8.

Description

Slope compensation circuit with adjustable output voltage amplitude and DC-DC exchanger Technical Field The invention relates to the technical field of analog circuits, in particular to a slope compensation circuit with adjustable output voltage amplitude and a DC-DC (direct current-direct current) exchanger. Background The slope compensation circuit is widely applied to the DC-DC converter and is a key core component for guaranteeing the stability of output voltage. The structure of the conventional slope compensation circuit is shown IN fig. 1, and mainly comprises a current source I1, a capacitor C1 and a switch tube M1, wherein the operating principle is that when an input signal IN is at a low level, the switch tube M1 is turned off, the current source I1 continuously charges the capacitor C1 to enable the voltage of an output end OUT to linearly rise, so as to generate a slope compensation voltage, the slope of the slope compensation voltage is determined by the current magnitude of the current source I1 and the capacity of the capacitor C1, and the highest voltage (i.e. amplitude) of the slope compensation voltage is completely dependent on the duration of the low level of the input signal IN, i.e. the longer the duration of the low level is, the more fully charged the capacitor C1 is, and the larger the output amplitude is. When the input signal IN is at high level, the switch tube M1 is turned on, the charge stored IN the capacitor C1 can be completely released IN a short time due to the extremely small on-resistance of the M1, so that the capacitor voltage is reduced to be close to 0V, and meanwhile, the voltage drop generated by the current source I1 flowing through the on-resistance of the M1 is very small and can be ignored, so that the voltage of the output end OUT is approximately kept to be 0V when the input is at high level. Based on this operating mechanism, by inputting a PWM waveform at the IN signal terminal, a desired slope compensation voltage can be obtained at the OUT terminal (as shown IN fig. 2 a). However, the output amplitude of the conventional slope compensation circuit lacks an effective limiting mechanism, and increases with the duration of the low level until the power supply voltage VCC is approached. IN practical application of the DC-DC converter, IN order to improve output capability IN heavy load situations or work efficiency IN light load situations, it is often necessary to reduce the switching frequency, which directly results IN a prolonged low level time of the input signal IN, so that the amplitude of the slope compensation voltage is synchronously increased. However, the lower core component of the slope compensation circuit is a voltage comparator, and the voltage processing range of the voltage comparator is definitely limited, and the excessive amplitude exceeds the normal working interval, so that the circuit misjudgment or the performance failure is caused. Based on this, a new solution is needed. Disclosure of Invention Therefore, the embodiment of the invention provides a slope compensation circuit with adjustable output voltage amplitude and a DC-DC exchanger, so as to at least solve the problem that the output amplitude of the slope compensation circuit in the prior art cannot be limited. The embodiment of the invention provides the following technical scheme: the embodiment of the invention provides a slope compensation circuit with adjustable output voltage amplitude, which comprises a transistor M1, a capacitor, a transistor M5 and a comparator; The grid electrode of the transistor M1 is connected with an input signal, one end of the capacitor is grounded after being connected with the source electrode of the transistor M1, and the other end of the capacitor is respectively connected with the drain electrode of the transistor M1 and the source electrode of the transistor M5; The drain electrode of the transistor M5 is connected with the current source generating circuit, the grid electrode is connected with the output end of the comparator, and the positive and negative input ends of the comparator are correspondingly connected with the slope compensation voltage and the reference voltage VREF2. Preferably, the comparator is configured to output a logic high level for pulling the gate voltage of the transistor M5 high to make M5 conductive when the slope compensation voltage is lower than the reference voltage VREF 2; When the slope compensation voltage is higher than the reference voltage VREF2, the comparator outputs a logic low level for pulling the gate voltage of the transistor M5 to a low level to turn off the transistor M5. Preferably, the slope compensation circuit is configured to adjust the magnitude of the slope compensation voltage by adjusting the magnitude of the reference voltage VREF 2. Preferably, the transistor M1 and the transistor M5 are both NMOS transistors. Preferably, the current source generating circuit includes: A transisto