CN-121984448-A - CMOS low noise amplifier topological structure based on noise cancellation and gain enhancement

CN121984448ACN 121984448 ACN121984448 ACN 121984448ACN-121984448-A

Abstract

The invention discloses a CMOS low-noise amplifier topological structure based on noise cancellation and gain enhancement, and belongs to the field of CMOS radio frequency integrated circuits. The gain cooperative enhancement module adopts a double-stage structure of 'transconductance enhancement and differential gain compensation'; the input matching module is a pi-type passive matching network, consists of two capacitors and an adjustable inductor, is matched with 500 MHz-10 GHz ultra-wideband impedance, and provides passive voltage gain; the mixed noise cancellation mechanism can synchronously inhibit coupling noise, thermal noise, parasitic noise and out-of-band interference, and compared with the prior art, the noise coefficient is obviously optimized, and the signal purification capability is stronger; the gain cooperative enhancement module realizes wide-band coverage, effectively suppresses high-frequency gain roll-off through a gain compensation design, controls full-band gain fluctuation in a reasonable range, and combines broadband characteristics and high-gain performance.

Inventors

Jia Chengnuo

Assignees

浙江大学

Dates

Publication Date: 20260505
Application Date: 20260123

Claims (5)

1. The CMOS low-noise amplifier topological structure based on noise cancellation and gain enhancement comprises an input matching module, a mixed noise cancellation module, a gain cooperative enhancement module, an output matching module and a biasing circuit, and is characterized in that: the hybrid noise cancellation module adopts a multi-coil phase coupling and five-order resonance hybrid mechanism, and the gain cooperative enhancement module adopts a transconductance enhancement and differential gain compensation two-stage structure.
2. The topology structure of the CMOS low noise amplifier based on noise cancellation and gain enhancement according to claim 1, wherein the input matching module is a pi-type passive matching network, consists of two capacitors and an adjustable inductor, is adapted to ultra-wideband impedance matching of 500 MHz-10 GHz, and provides passive voltage gain.
3. The CMOS low noise amplifier topology based on noise cancellation and gain enhancement of claim 1, wherein the hybrid noise cancellation module comprises a third-order phase coupler, a fifth-order resonant noise cancellation unit, and a common-gate Cascode signal synthesis unit; the third-order phase coupler simplifies a self-multi-coil coupling structure and is used for counteracting coupling noise and parasitic noise; the five-order resonance noise elimination unit comprises a three-way coupling transformer and a differential amplifying circuit and is used for counteracting the thermal noise and flicker noise of the MOS tube.
4. The CMOS low noise amplifier topology based on noise cancellation and gain enhancement of claim 1, wherein the gain co-enhancement module comprises a transconductance enhancement unit and a differential gain compensation unit; the transconductance enhancement unit adopts a gm-boosting technology, a main amplifying tube works in a moderate inversion region, and an auxiliary tube works in a weak inversion region; the differential gain compensation unit is a single-stage differential amplification circuit, and introduces a Class-AB common source stage to compensate high-frequency gain roll-off.
5. The noise cancellation and gain enhancement based CMOS low noise amplifier topology of claim 1, further comprising a topology workflow comprising the steps of: s1, a weak radio frequency signal received by an antenna firstly enters an input matching module, impedance matching is completed through a pi-type network, and primary passive gain improvement is realized while signal reflection loss is reduced; S2, the matched signals are sent to a mixed noise cancellation module, a third-order phase coupler performs inverse processing on the coupling noise and the parasitic noise to generate cancellation signals, a fifth-order resonance noise cancellation unit synchronously suppresses MOS tube thermal noise, flicker noise and out-of-band interference, and the two paths of processed signals are overlapped in a common-gate Casode signal synthesis unit to realize mutual noise cancellation and useful signal reinforcement, and meanwhile, circuit linearity is improved; s3, the signal enters a gain cooperative enhancement module, the transconductance enhancement unit remarkably improves the basic gain of the signal, and the differential gain compensation unit counteracts the attenuation of the gain of the high frequency band in a targeted manner, so that the gain stability of the full frequency band is ensured; And S4, finally, finishing impedance conversion through the output matching module, outputting the impedance conversion to a rear-stage radio frequency circuit, dynamically adjusting the working current of each module by the bias circuit in the whole process according to the intensity of an input signal, reducing the power consumption in a small signal scene, improving the driving capability in a large signal scene, and always maintaining the optimal balance of the power consumption and the performance.

Description

CMOS low noise amplifier topological structure based on noise cancellation and gain enhancement Technical Field The invention relates to the field of CMOS radio frequency integrated circuits, in particular to a CMOS low-noise amplifier topological structure based on noise cancellation and gain enhancement. Background The low noise amplifier is a core unit of the radio frequency receiving front end, and its performance directly determines the system receiving sensitivity and signal-to-noise ratio. In the CMOS process scenario, performance balance of low noise figure, high gain, wide operating bandwidth and low power consumption needs to be achieved at the same time, and noise cancellation and gain enhancement techniques are key means for achieving the objective. In the prior art, the patent with the publication number of CN118432550A proposes a CMOS broadband low-noise amplifier based on multi-coil coupling noise elimination, and a multi-coil phase coupling noise elimination circuit and a differential gain amplification circuit are adopted to realize broadband coverage of 500 MHz-6 GHz, so that the noise cancellation effect is obvious, but the problems of higher circuit complexity, additional parasitic parameters introduced by a multi-coil structure and insufficient compatibility in an advanced CMOS process of 28nm or below exist. The patent with publication number CN116015220A simplifies the circuit structure by a five-order resonant circuit and a transconductance enhancement technology, is adaptive to 40 nm-28 nm advanced technology, has excellent power consumption control, but has limited capability of suppressing coupling noise and parasitic noise only aiming at MOS tube thermal noise, has poor gain stability in an ultra-wideband range, and has obvious high-frequency band gain roll-off. In addition, the prior art has the defect of cooperative optimization of noise cancellation and gain enhancement, and is difficult to realize the performance closed loop with low noise, high gain, low power consumption and high linearity in a broadband range. Thus, there is a need for a new topology that combines the advantages of the prior art, making up for the respective short plates. Disclosure of Invention The invention aims to solve the problems that the existing CMOS low-noise amplifier topological structure is single in noise cancellation mechanism and cannot simultaneously inhibit coupling noise, thermal noise and parasitic noise, 2, the gain enhancement technology is poor in adaptability to broadband characteristics and serious in high-frequency band gain attenuation, 3, the circuit complexity is contradictory to the process compatibility, or the structure is complex and difficult to adapt to advanced processes or the structure is simplified to cause performance loss, 4, the power consumption and the performance balance are poor, and high-gain and low-noise designs often accompany high power consumption. According to one aspect of the invention, the CMOS low noise amplifier topology structure based on noise cancellation and gain enhancement comprises an input matching module, a mixed noise cancellation module, a gain cooperative enhancement module, an output matching module and a bias circuit in sequence from the signal flow direction, wherein the modules work cooperatively to realize performance optimization, and the method comprises the following steps; 1. input matching module The pi-type passive matching network is adopted, and consists of two capacitors and an adjustable inductor, so that the traditional bulk inductor structure is replaced, and the chip area is reduced. The module combines the requirements of simplified matching and broadband adaptation, realizes the impedance matching of an ultra-wideband range through an adjustable inductor, simultaneously provides basic gain for a later stage by utilizing the passive voltage gain characteristic of a pi-type network, reduces the gain pressure of the later stage, and gives consideration to the chip area and broadband matching performance. 2. Hybrid noise cancellation module The method combines the core advantages of two noise cancellation technologies, constructs a multi-coil phase coupling and five-order resonance hybrid mechanism, realizes the comprehensive suppression of multi-type noise, and specifically comprises the following steps: and the multi-coil simplifying unit is used for simplifying a coil structure to be a third-order phase coupler based on a multi-coil coupling noise elimination principle, and removing redundant coils to reduce parasitic parameter interference. The unit receives the differential signals output by the input matching module, generates offset signals with equal amplitude and opposite phase to main path coupling noise and parasitic noise through accurate phase inversion processing, and realizes the efficient suppression of the noise. And the five-order resonance noise elimination unit adopts a three-way coupling transformer an