CN-121984465-A - FPGA-based satellite-borne optical amplifier power closed-loop control system

CN121984465ACN 121984465 ACN121984465 ACN 121984465ACN-121984465-A

Abstract

The invention discloses a power closed-loop control system of a satellite-borne optical amplifier based on an FPGA (field programmable gate array), which belongs to the technical field of satellite-borne optical communication and comprises a radiation-resistant FLASH type FPGA serving as a core controller, wherein a configuration storage unit is based on a floating gate transistor physical structure so as to eliminate configuration overturning risks caused by single event bombardment, an FPGA internal control logic adopts a pure hardware pipeline architecture and comprises combination logic and sequential logic, a software instruction scheduling link is omitted, a feedforward unit realizes quick response through a pre-stored mapping table of input optical power and pumping current, a feedback unit realizes fine steady-state correction through parallel hardware PID, and feedforward quantity and feedback quantity are subjected to weighted fusion through a hardware multiplier-adder to form the closed-loop control system. The invention adopts a closed-loop control architecture combining feedforward and feedback, and the feedforward unit can output the pre-adjustment quantity within 50ns at the moment of abrupt change of the input optical power, so as to quickly inhibit the initial overshoot of the pump relaxation oscillation, and greatly shorten the response time of the system.

Inventors

ZHANG QI
WANG YUBO
JIN CAOFAN
ZHENG ZHOU
TONG YULONG

Assignees

上海聿凡领光通信有限公司

Dates

Publication Date: 20260505
Application Date: 20260408

Claims (10)

1. The utility model provides a satellite-borne optical amplifier power closed loop control system based on FPGA which characterized in that includes: the anti-irradiation FLASH type FPGA is adopted as a core controller, and a configuration storage unit is based on a floating gate transistor physical structure so as to eliminate configuration overturning risks caused by single particle bombardment; The FPGA internal control logic adopts a pure hardware pipeline architecture, comprises combination logic and sequential logic, and has no software instruction scheduling link; the feedforward unit realizes quick response through a pre-stored mapping table of 'input optical power-pumping current', and the feedback unit adopts parallel hardware PID to realize fine steady-state correction; The feedforward quantity and the feedback quantity are weighted and fused through a hardware multiplier-adder to form a closed-loop control system.
2. The FPGA-based satellite-borne optical amplifier power closed-loop control system of claim 1, wherein the feedforward unit specifically comprises: the input optical power is sampled in real time through a beam splitter and is converted into an electric signal through a photodiode; The FPGA is internally pre-stored with an 'input optical power-pumping current' mapping table, and the pre-adjustment quantity is output at the moment of abrupt change of input in a table look-up mode, so that the initial overshoot of the pumping relaxation oscillation is restrained.
3. The FPGA-based satellite-borne optical amplifier power closed-loop control system of claim 1, wherein the feedback unit specifically comprises: The output light is sampled by a beam splitter and converted into an electric signal by a photodiode; The hardware PID module dynamically generates correction amount based on the deviation, eliminates long-term drift, independently calculates a proportional path and an integral path, and outputs the proportional path and the integral path to the adder in parallel.
4. The FPGA-based satellite-borne optical amplifier power closed loop control system of claim 1, further comprising a special radiation hardening design, comprising in particular: the key state machine adopts triple state coding redundancy, and when single-bit errors are caused by single-event upset, the hardware voter corrects in real time; And checking an external control signal instruction received by the FPGA, detecting signal transmission errors in real time, and detecting 100% of error detection rate.
5. The FPGA-based satellite-borne optical amplifier power closed-loop control system of claim 1, further comprising a TMR storage and hardware control linkage design, specifically comprising: the key calibration parameters are stored in an anti-irradiation external FLASH in three copies; And when the FPGA reads the parameters each time, the hardware voting circuit synchronously executes the three-out-two check, if a single-copy error is detected, the correct copy is immediately started to update the register, the hardware flag bit is triggered, and the control logic is automatically switched.
6. The FPGA-based satellite-borne optical amplifier power closed-loop control system of claim 1, further comprising a dynamic weight adjustment algorithm, specifically: Monitoring the change rate of the input optical power in real time, and dynamically adjusting the fusion weight of the feedforward and feedback signals according to the change rate; and when the change rate is smaller, increasing the weight of the feedback signal.
7. The FPGA-based satellite-borne optical amplifier power closed-loop control system of claim 1, further comprising a hardware error recovery mechanism, specifically: Monitoring the running state and parameter error condition of each module in the FPGA; the device comprises a hardware error recovery state machine, wherein the hardware error recovery state machine is configured to automatically resend the previous cycle control data when the parity check detects a transmission error, and forcedly switch to a pre-stored safe current value when the TMR voting is carried out for N times continuously to detect a parameter error.
8. The FPGA-based satellite-borne optical amplifier power closed-loop control system of claim 1, further comprising a multi-level health management system, in particular: Integrating various sensors and monitoring modules, monitoring key parameters and running states of the optical amplifier and a control system thereof in real time, forming a health detection module through internal logic of the FPGA, counting temperature and voltage abnormality marks in real time, and automatically triggering safety shutdown through a hardware state machine when detecting that accumulated errors exceed a threshold value.
9. The FPGA-based satellite-borne optical amplifier power closed loop control system of any one of claims 1-8, wherein the pure hardware logic implementation path of the FPGA comprises: the feedforward unit generates basic pumping current through a pre-stored ROM table look-up; the feedback unit adopts parallel hardware PID to realize dynamic correction; the state code redundancy and the input signal parity are implemented by hardware circuitry.
10. The FPGA-based satellite-borne optical amplifier power closed-loop control system according to claim 9, wherein the system is suitable for scenes with high reliability requirements such as deep space exploration and satellite communication, and has the following technical effects: The configuration overturning risk is eliminated, and the reliability and stability of the system are improved; The nanosecond control response is realized, and the microsecond transient window of the optical amplifier is precisely matched; High-reliability operation is realized through special radiation hardening design and TMR storage and hardware control linkage design, and the system failure rate is remarkably reduced.

Description

FPGA-based satellite-borne optical amplifier power closed-loop control system Technical Field The invention relates to the technical field of satellite-borne optical communication, in particular to a power closed-loop control system of a satellite-borne optical amplifier based on an FPGA. Background With the rapid development of the aerospace technology, the satellite-borne optical communication becomes a key technical direction in the field of modern aerospace communication by virtue of the remarkable advantages of large capacity, high speed, interference resistance and the like. In a satellite-borne optical communication system, an optical amplifier is used as a core component and plays an important role of amplifying power of an optical signal to compensate transmission loss, and the reliability and effectiveness of the whole communication system are directly determined by the performance of the optical amplifier. However, the satellite-borne environment is extremely complex and harsh, and the power control of the optical amplifier presents a serious challenge. On the one hand, space has high-energy particle radiation, including charged particles such as protons, electrons and heavy ions, and the high-energy particles can interact with electronic devices in the optical amplifier to cause single-particle effects, such as single-particle overturn, single-particle latch and the like, so that the devices are abnormal in function and even permanently damaged, and the normal operation of the optical amplifier is seriously influenced. In particular, SRAM type FPGA controllers are widely used, which are highly sensitive to Single Event Upset (SEU) based on the configuration structure of volatile memory cells. Once the configuration bits flip, they cause control logic to be disturbed or even the system to lock. On the other hand, in the operation process of the satellite-borne optical communication system, the input optical power can be changed rapidly due to various factors, such as optical path alignment deviation caused by satellite attitude adjustment, and interference of the space optical signal caused by atmospheric turbulence. This requires an optical amplifier with a fast response capability that can quickly adjust the output power when the input optical power is suddenly changed to maintain stable transmission of the optical signal. If the response speed is insufficient, the output optical power can overshoot or undershoot, which causes optical signal distortion, reduces communication quality, and even causes communication interruption. Currently, a single feedback control mode is adopted in some optical amplifier power control systems. The feedback control is implemented by monitoring the output optical power and comparing it with a set value, and adjusting the pumping current according to the deviation. However, this control method has inherent defects, and the system response speed is slow because a certain time is required for collecting, processing and adjusting the feedback signal. When the input optical power changes rapidly, the feedback control cannot adjust in time, the output optical power can fluctuate greatly, and the requirement of satellite-borne optical communication on high-precision control is difficult to meet. The radiation hardening design of existing optical amplifier power control systems is often not comprehensive enough for space radiation environments. The partial system only considers the anti-radiation performance on the key chip selection, and adopts commercial devices with certain anti-radiation capability, but the anti-radiation indexes of the devices are limited, and the devices can still be in fault under the high-intensity radiation environment. The existing system generally lacks an on-chip autonomous health monitoring and linkage fault tolerance mechanism. The key calibration parameters are stored in a non-reinforced memory in a single-copy mode, once single event upset tampering data occurs, the system cannot be identified and corrected independently, and the system often needs to rely on ground station injection instructions for repairing, has a delayed response and is limited by measurement and control arc segments. Meanwhile, the system lacks real-time hardware level monitoring on the states of an internal register and a signal transmission state, and is difficult to trigger safety protection in a fault germination stage, so that the failure risk of an on-orbit task is increased. Therefore, a power closed-loop control system of the FPGA-based satellite-borne optical amplifier is provided. Disclosure of Invention The invention aims to solve the problems in the prior art, and provides a satellite-borne optical amplifier power closed-loop control system based on an FPGA. In order to achieve the above purpose, the present invention adopts the following technical scheme: An FPGA-based satellite-borne optical amplifier power closed-loop control system comprising: the ant