CN-121984480-A - Circuit architecture, oscillator, chip and electronic equipment

Abstract

The specification provides a circuit architecture, an oscillator, a chip and an electronic device. The circuit architecture comprises an oscillating circuit, at least one frequency modulation unit, a control subunit and an energy storage subunit, wherein the oscillating circuit is provided with at least one oscillating loop, the oscillating loop comprises at least one frequency modulation node, the control subunit comprises a first end, a second end and a control end, the first end is electrically connected with the frequency modulation node, the second end is electrically connected with the first end of the energy storage subunit, the control end is configured to receive a control voltage, the second end of the energy storage subunit is electrically connected with a reference potential end, and the control subunit is configured to respond to the control voltage to adjust the energy storage subunit so that the equivalent capacitance at the frequency modulation node changes along with the control voltage. The circuit architecture has the effects of simple structure and capability of keeping linearity of output frequency in a wider voltage range.

Inventors

• Request for anonymity
• Request for anonymity

Assignees

• 摩尔线程智能科技(北京)股份有限公司

Dates

Publication Date

20260505

Application Date

20260305

Claims (13)

1. 1. A circuit architecture characterized in that the circuit architecture comprises: An oscillating circuit having at least one oscillating loop, the oscillating loop comprising at least one frequency modulation node; the frequency modulation unit comprises a control subunit and an energy storage subunit, wherein the control subunit is provided with a first end, a second end and a control end, the first end is electrically connected with the frequency modulation node, the second end is electrically connected with the first end of the energy storage subunit, and the control end is configured to receive control voltage; Wherein the control subunit is configured to adjust the energy storage subunit in response to the control voltage such that the equivalent capacitance at the frequency modulation node varies with the control voltage.
2. 2. The circuit architecture of claim 1, wherein the first end of the energy storage subunit is configured to access the frequency modulation node via the control subunit when the control subunit responds to the control voltage.
3. 3. The circuit architecture of claim 1, wherein the circuit architecture comprises M frequency modulation units, wherein at least one of the oscillation loops comprises N of the frequency modulation nodes; m is an integer greater than or equal to 1, N is an integer greater than or equal to 1, and M frequency modulation units are respectively and electrically connected with at least one frequency modulation node of N frequency modulation nodes.
4. 4. The circuit architecture of claim 3, wherein the control subunit comprises a control transistor; The drain electrode of the control transistor is electrically connected with the frequency modulation node, the source electrode of the control transistor is electrically connected with the first end of the energy storage subunit, and the grid electrode of the control transistor is electrically connected with the control end.
5. 5. The circuit architecture of claim 4, wherein the control transistor is an N-type transistor or a P-type transistor.
6. 6. The circuit architecture of claim 4, wherein among the M FM units, the gates of the control transistors in each of the control subunits are electrically connected to each other to receive the same control voltage.
7. 7. The circuit architecture of claim 4, wherein among the M frequency modulation units, the gates of the control transistors in each of the control subunits are electrically isolated from each other and are each configured to receive an independent control voltage.
8. 8. The circuit architecture of claim 4, wherein the energy storage subunit comprises an energy storage capacitor; the first end of the energy storage capacitor is electrically connected with the source electrode of the control transistor, and the second end of the energy storage capacitor is electrically connected with the reference potential end.
9. 9. The circuit architecture of claim 8, wherein the storage capacitor comprises a first metal layer, a dielectric layer, and a second metal layer; the dielectric layer is sandwiched between the first metal layer and the second metal layer; Wherein at least a portion of the first metal layer forms a first end of the storage capacitor and at least a portion of the second metal layer forms a second end of the storage capacitor.
10. 10. The circuit architecture of claim 8, wherein the storage capacitor is a non-voltage controlled capacitor.
11. 11. An oscillator comprising a circuit architecture as claimed in any one of claims 1 to 10.
12. 12. A chip, characterized in that: comprising an oscillator as claimed in claim 11.
13. 13. An electronic device comprising a chip as claimed in claim 12.

Description

Circuit architecture, oscillator, chip and electronic equipment Technical Field The present disclosure relates to the field of electronic devices, and in particular, to a circuit architecture, an oscillator, a chip, and an electronic device. Background The oscillator is a fundamental module in an analog integrated circuit for generating periodic signals, often as a key element in a phase locked loop, frequency synthesizer, radio frequency transceiver and clock distribution network. In the related art, in order to achieve both frequency coverage and frequency resolution, a combination of coarse tuning and fine tuning is often used. In a fine tuning implementation, a voltage-controlled capacitor (varactor) is more commonly used as a tuning element, and the capacitance value of the varactor is changed by changing the bias voltage of the varactor, so that the equivalent capacitance at the node of the oscillation loop is changed, and the frequency is continuously adjusted. However, the voltage-controlled capacitor has significant nonlinearity, which is manifested in that the frequency change rate is large in some voltage intervals and small in some intervals. Furthermore, a mode of adopting a plurality of groups of varistors to be connected in parallel and setting different bias points is also proposed in the prior art to widen the linear interval, but the scheme is generally more complex in structure, and additional bias generation and calibration circuits are often needed, so that the design and verification complexity and the realization cost are increased. Disclosure of Invention To overcome the problems in the related art, the present specification provides a circuit architecture, an oscillator, a chip, and an electronic device. On the premise of relatively simplifying the structure, the controlled change of the equivalent capacitance at the frequency modulation node along with the control voltage is realized, so that the linearity of the output frequency can be maintained in a wider voltage range. According to a first aspect of embodiments of the present specification, there is provided a circuit architecture comprising: An oscillating circuit having at least one oscillating loop, the oscillating loop comprising at least one frequency modulation node; the frequency modulation unit comprises a control subunit and an energy storage subunit, wherein the control subunit is provided with a first end, a second end and a control end, the first end is electrically connected with the frequency modulation node, the second end is electrically connected with the first end of the energy storage subunit, and the control end is configured to receive control voltage; the control subunit is configured to adjust the energy storage subunit in response to the control voltage such that an equivalent capacitance at the frequency modulation node varies with the control voltage. In some embodiments of the present disclosure, the first end of the energy storage subunit is configured to access the frequency modulation node via the control subunit when the control subunit responds to the control voltage. In some embodiments of the present disclosure, the circuit architecture comprises M frequency modulation units, at least one of the oscillation loops comprises N frequency modulation nodes; m is an integer greater than or equal to 1, N is an integer greater than or equal to 1, and M frequency modulation units are respectively and electrically connected with at least one frequency modulation node of N frequency modulation nodes. In some embodiments of the present disclosure, the control subunit includes a control transistor; The drain electrode of the control transistor is electrically connected with the frequency modulation node, the source electrode of the control transistor is electrically connected with the first end of the energy storage subunit, and the grid electrode of the control transistor is electrically connected with the control end. In some embodiments of the disclosure, the control transistor is an N-type transistor or a P-type transistor. In some embodiments of the present disclosure, among the M frequency modulation units, gates of the control transistors in each of the control subcells are electrically connected to each other to receive the same control voltage. In some embodiments of the present disclosure, among the M frequency modulation units, gates of the control transistors in each of the control subunits are electrically isolated from each other and are each configured to receive an independent control voltage. In some embodiments of the present disclosure, the energy storage subunit comprises an energy storage capacitor; the first end of the energy storage capacitor is electrically connected with the source electrode of the control transistor, and the second end of the energy storage capacitor is electrically connected with the reference potential end. In some embodiments of the present disclosure, the stora