CN-121984505-A - Soft-hard cooperative analog-to-digital converter calibration method based on adaptive moment estimation

Abstract

The invention discloses a soft-hard collaborative analog-to-digital converter calibration method based on self-adaptive moment estimation, which solves the problem that the traditional software calibration cannot meet the high sampling rate throughput through high-speed statistics of mass data processed by FPGA hardware logic, and effectively solves the problems of LMS algorithm oscillation and local optimum sinking caused by analog delay line nonlinearity by running an ADAM optimization algorithm and dynamically adjusting the updating step length of each parameter through second moment estimation through an embedded soft-core processor, and realizes the dual promotion of calibration speed and precision by combining a hierarchical calibration strategy.

Inventors

• CHEN AIJUN
• TIAN SHULIN
• YANG KUOJUN
• Ye Pi
• HU YADONG
• LI CHENGYANG
• PAN ZHIXIANG
• HUANG WUHUANG
• QIU DUYU
• WANG HOUJUN

Assignees

• 电子科技大学

Dates

Publication Date

20260505

Application Date

20260126

Claims (3)

1. 1. The soft-hard cooperative analog-to-digital converter calibration method based on the adaptive moment estimation is characterized by comprising the following steps of: (1) Setting the number of sub-channels of the TI acquisition system to be calibrated as Each sub-channel is at the moment Is recorded as the sampled data of , wherein, ; (2) Performing real-time statistics and gradient extraction on the parallel data streams by using the FPGA; (2.1) inputting the input signal into the TI acquisition system, and obtaining the TI through ADC sampling A parallel data stream; (2.2) counting the number of the channel points Equivalent time interval within ; ; Wherein, the Represent the first The individual channels are at the moment Is used for the sampling value of (a), Counting the number of data points in the window; (2.3) calculating the relative gradient error estimation value of each channel : ; (3) Performing soft and hard data interaction through an on-chip bus; The relative gradient error of each channel calculated in the step (2) is calculated through an AXI4-Lite bus or a shared memory mechanism Transmitting the data to an embedded soft core processor in the FPGA; (4) Running an adaptive moment estimation algorithm ADAM in a soft core processor to obtain an optimal delay adjustment control word of each channel; (4.1), initializing an ADAM algorithm; setting the first moment of the gradient Second moment of Initializing the values of each element of the first moment and the second moment to be 0; (4.2) error in the relative gradient of the channels As input to the ADAM algorithm, it is noted that ; (4.3) Updating the channels in the first channel First moment of gradient after round iteration : ; Wherein, the A correction coefficient that is a first moment; (4.4) updating the channels in the first channel Second moment of gradient after round iteration : ; Wherein, the A correction coefficient for the second moment; (4.5) correcting the first moment Second moment of Is defined as the deviation: ; Wherein, the Representation of A kind of electronic device A power of the second; Representation of A kind of electronic device A power of the second; Is that Is used for the correction value of (c), Is that Is a correction value of (2); (4.6) calculating the respective channels at the first Delay adjustment control word after round iteration ; ; Wherein, the For the global learning rate of the device, A small constant to prevent zero denominator; (4.7) updating the relative gradient error; Adjusting delay of each channel to control word Feedback to ADC analog delay adjusting unit according to Adjusting the phase of the sampling clock of each sub-channel, then re-executing step (2.1), and updating the relative gradient error of each channel based on the newly acquired parallel data stream : ; (4.8), Calculate the first Loss function of TI acquisition system after round iteration ; ; Wherein, the Is a rough adjustment loss function value; is a fine tuning loss function value; (4.9) first judging the coarse calibration stage Whether or not to converge, if Non-convergence, make Then return to step (4.1) for the next iteration, if Convergence judgment in the fine calibration stage is entered if convergence is performed, step (4.10) is entered if the fine calibration stage satisfies the convergence condition, otherwise, the process is executed Then returning to the step (4.1) for the next iteration; (4.10) outputting the optimal delay adjustment control word to be Convergence time of the first Delay adjustment control word of each channel obtained after multiple iterations As an optimal delay adjustment control word, it is noted that ; (5) Adjusting control words for optimal delay of each channel Feedback to ADC analog delay adjusting unit according to And (2) adjusting the phase of each sub-channel sampling clock, and then re-executing the step (2.1) to output a calibrated signal.
2. 2. The method for calibrating a soft-hard collaborative analog-to-digital converter based on adaptive moment estimation according to claim 1, wherein the coarse loss function value The calculation method of (1) is as follows: ; Wherein, the Indicating that each channel is at the first Point number after multiple iterations The equivalent time interval within the time period of the time, In-point count for each channel Equivalent time interval within Is a mean value of (c).
3. 3. The method for calibrating a soft-hard collaborative analog-to-digital converter based on adaptive moment estimation according to claim 1, wherein the fine tuning loss function value The calculation method of (1) is as follows: ; Wherein, the Indicating that each channel is at the first Relative gradient error after the round iteration.

Description

Soft-hard cooperative analog-to-digital converter calibration method based on adaptive moment estimation Technical Field The invention belongs to the technical field of digital signal processing, and particularly relates to a soft-hard cooperative analog-to-digital converter calibration method based on self-adaptive moment estimation. Background With the increasing demand of communication and radar systems for bandwidth, ultra-high-speed sampling ADCs are widely used in the fields of base station transceiver and high-speed instruments and meters. Due to the limitation of modern semiconductor technology, a single ADC core often cannot realize a sampling rate greater than 10GSPS, so modern acquisition systems generally employ Time Interleaving (TI) techniques, asynchronous Time Interleaving (ATI) techniques, digital Bandwidth Interleaving (DBI) techniques, and other techniques to equivalently increase the sampling rate, bandwidth, and resolution of the acquisition system. The time interleaving sampling technology in the technologies is widely applied to modern ultra-high-speed ADC because of easy engineering realization, and the integral sampling rate of the system is linearly improved by splicing a plurality of ADC sub-cores. However, due to the process deviation of the analog device, physical parameters of front-end analog circuits of different sampling paths cannot be guaranteed to be identical by parallel sampling of multiple sub-cores, and channel mismatch errors are inevitably generated in the TI architecture. Among them, the time skew (TIMING SKEW) error affects the signal integrity of the high-frequency signal most seriously, which can cause spurious components which are difficult to filter out in the sampling result, and seriously reduces the signal-to-noise ratio (SNR) and spurious-free dynamic range (SFDR) of the system. Currently, digital domain reconstruction or analog domain delay adjustment is mostly adopted for time error calibration of a TI acquisition system. The existing calibration method mainly has the following defects: 1. LMS algorithm limitations traditional Least Mean Square (LMS) based adaptive calibration methods typically use a fixed step size. The step size is too large, so that the algorithm can generate periodic oscillation around the optimal solution near the steady state, error residues are caused, and the convergence speed is extremely slow if the step size is too small. In addition, the Analog delay line (Analog DELAY LINE) in the actual circuit often has nonlinear characteristics, so that the LMS algorithm is difficult to adaptively adjust the gradient direction, and is easy to sink into local optimum. 2. The contradiction between the realization complexity and the real-time performance is that the advanced optimization algorithm has excellent performance, but comprises complex operations such as evolution, division and the like. If the method is completely implemented in FPGA logic, the timing sequence convergence is difficult and a large amount of DSP resources are consumed, and if the method is completely implemented in software, the general processor cannot bear mass data throughput pressure of tens of GSPS levels. In summary, there is no simple and general method for solving the convergence problem caused by the nonlinearity of the analog delay line and balancing the hardware resource consumption and real-time requirements. Therefore, it is very important to design a calibration method with high precision and rapid convergence, which is in coordination with the hardness. Disclosure of Invention The invention aims to overcome the defects of the prior art, and provides a soft-hard cooperative analog-digital converter calibration method based on self-adaptive moment estimation, which adopts a cooperative framework of 'FPGA hardware logic error estimation + embedded soft-core processor parameter decision', solves the problem of non-linearity of an analog device by utilizing the self-adaptive characteristic of an ADAM algorithm, and realizes efficient error correction and compensation by a hierarchical calibration strategy. In order to achieve the aim of the invention, the invention provides a soft-hard cooperative analog-to-digital converter calibration method based on adaptive moment estimation, which is characterized by comprising the following steps: (1) Setting the number of sub-channels of the TI acquisition system to be calibrated as Each sub-channel is at the momentIs recorded as the sampled data of, wherein,; (2) Performing real-time statistics and gradient extraction on the parallel data streams by using the FPGA; (2.1) inputting the input signal into the TI acquisition system, and obtaining the TI through ADC sampling A parallel data stream; (2.2) counting the number of the channel points Equivalent time interval within; ; Wherein, the Represent the firstThe individual channels are at the momentIs used for the sampling value of (a),Counting the number of data poi