CN-121984512-A - Linear voltage-to-time converter circuit supporting rail-to-rail input and implementation method
Abstract
The invention discloses a linear voltage-time converter circuit supporting rail-to-rail input and an implementation method thereof, wherein the circuit structure comprises a main input branch, an auxiliary input branch, a differential output node, an output buffer stage and a reset module; the auxiliary input branch is used for compensating nonlinearity of the first differential pair of the main input branch, and compression nonlinearity of the voltage-time transmission characteristic of the auxiliary input branch and expansibility nonlinearity of the voltage-time transmission characteristic of the main input branch are approximately offset in a wider input voltage range, so that good linearity can be maintained under high input voltage swing. The invention adopts a full parallel structure, has simple design and high robustness, expands the linear input range to the whole power rail, solves the distortion problem under the input of large signals, greatly widens the available input dynamic range of the circuit, has adjustable gain, and is suitable for various application scenes needing high linearity to process the large signals.
Inventors
- TANG XIYUAN
- WANG JINGPENG
Assignees
- 北京大学
Dates
- Publication Date
- 20260505
- Application Date
- 20260119
Claims (9)
- 1. A method of implementing a linear voltage-to-time converter circuit supporting rail-to-rail input, comprising the steps of: 1) An auxiliary input branch is arranged in parallel with the main input branch, signal branching and preprocessing are carried out, and the design parameters of the circuit transistor are scanned and configured; The main input branch comprises a first differential input pair; The auxiliary input branch comprises a pair of source followers and a second differential input pair, wherein the source followers are used for receiving differential voltage signals input from the outside and outputting the differential voltage signals to the second differential input pair after direct current level shifting; Scanning and configuring design parameters of the first differential input pair transistor, the second differential input pair transistor and the source follower, and simulating to obtain a transmission characteristic relation between input voltage and output time signals; 2) Generating a complementary nonlinear current by generating a first discharge current based on the input voltage signal using a first differential input pair, and generating a second discharge current based on the DC level shifted signal using a second differential input pair configured with design parameters; 3) The current superposition, namely superposing the first discharge current and the second discharge current at the differential output node of the circuit to obtain the total discharge current; 4) The time signal conversion is to discharge the load capacitor connected with the differential output node by utilizing the total discharge current and convert the voltage signal into a time signal; 5) And the gain adjustment is that the bias current of the source follower of the auxiliary input branch is adjusted to change the working point and the DC level displacement of the source follower, so as to finely adjust the integral conversion gain from voltage to time.
- 2. The method of claim 1, wherein in step 1), the external differential voltage signal is applied to the source follower of the auxiliary input branch and the first differential input pair of the main input branch simultaneously, the direct current level of the input signal is shifted by the source follower, and the shifted signal is transmitted to the second differential input pair.
- 3. The method of claim 1, wherein the design parameters include an aspect ratio and a bias condition.
- 4. A method of implementing a linear voltage-to-time converter circuit supporting rail-to-rail input as claimed in claim 1, characterized in that a set of parameters with a minimal nonlinearity of the transmission characteristic relationship is taken as final design parameter.
- 5. The method according to claim 1, wherein in step 4), a rising or falling edge is generated when the capacitor voltage drops to a predetermined output buffer level threshold voltage, and the voltage signal is converted into a time signal.
- 6. The method of claim 1, wherein in step 3), the first discharging current generated by the main input branch and the second discharging current generated by the auxiliary input branch are converged and overlapped at the differential output node, the load capacitor is discharged together, ramp voltages which decrease with time are respectively formed at the differential output node, and the larger the input voltage is, the larger the falling slope of the ramp voltage at the differential output node is.
- 7. A linear voltage-to-time converter circuit supporting rail-to-rail inputs implemented using the method of claim 1, comprising a main input leg, an auxiliary input leg, a differential output node, an output buffer stage, and a reset module, wherein: the main input branch comprises a first differential input pair, a second differential input pair and a first discharge current, wherein the first differential input pair is used for receiving an externally input differential voltage signal and generating a first discharge current according to the signal; an auxiliary input branch, which is arranged in parallel with the main input branch and comprises a pair of source followers and a second differential input pair; The differential output node is used for converging and superposing the first discharging current and the second discharging current to form a slope voltage which decreases with time; The output buffer stage consists of a plurality of pairs of cascaded inverters or buffers and is used for shaping the slope voltage on the differential output node, generating a steep rising edge or falling edge when the slope voltage passes through the threshold voltage of the inverters or buffers, and obtaining a final time signal represented by the time difference between the rising edge or the falling edge; The reset module comprises a pair of reset switches and a switch current source, wherein the pair of reset switches are respectively connected with the differential output node to the power supply voltage, one end of the switch current source is connected with the source ends of the first differential pair and the second differential pair, and the other end of the switch current source is connected with the ground voltage.
- 8. The linear voltage-to-time converter circuit of claim 7 wherein the voltage-to-time converter, when reset, the pair of reset switches are closed to precharge the load capacitance of the differential output node to the supply voltage to prepare the discharge current generated by the first differential pair and the second differential pair for discharging the load capacitance when the voltage-to-time converter is in operation, and wherein the switch current source is opened to disconnect the first differential pair and the second differential pair from ground.
- 9. The linear voltage-to-time converter circuit of claim 8 wherein the reset switch is open to avoid disturbing load capacitance discharges when the voltage-to-time converter is in operation, and wherein the switch current source is closed to provide a path to ground for discharge currents generated by the first differential pair and the second differential pair.
Description
Linear voltage-to-time converter circuit supporting rail-to-rail input and implementation method Technical Field The present invention relates to a signal processing and converting circuit, and more particularly to a linear Voltage-to-Time Converter (VTC) circuit for supporting rail-to-rail input, which is a Voltage-to-Time Converter (VTC) with a wide linear input range. Background The voltage-time converter is a core circuit unit for linearly converting an analog voltage signal into a time signal (such as pulse width or delay), and has wide application in the fields of time domain signal processing, high-speed communication interfaces, precision measuring instruments, analog-to-digital conversion systems and the like. The common existing voltage-to-time converter technology is implemented based on the constant current discharge principle. The basic structure generally includes an input differential pair transistor, a constant current source, a switch, and a load capacitor. The working principle of the load capacitor charging circuit is that in a reset stage, a switch is turned off, a load capacitor is precharged to an initial voltage, in a conversion stage, the switch is turned on, an input differential pair carries out differential distribution on the current of a constant current source according to the input voltage to be converted, and accordingly a discharging current related to the input voltage is generated, and the discharging current discharges the load capacitor. When the capacitor voltage drops to a preset threshold voltage, the required time is the conversion result. However, an inherent disadvantage of this configuration is that there is a severe coupling relationship between its input voltage swing and its conversion linearity, which will be severely reduced when the input voltage swing is too large. When the input voltage swing is too large, one transistor in the input differential pair approaches or even enters the cut-off region due to too small gate-source voltage, so that the output current of the transistor is too small, the load capacitor voltage cannot drop to the preset threshold voltage, the time edge cannot be generated or the transistor can be generated only in too long time, and the linearity of the discharging process is seriously damaged. Therefore, the conventional voltage-to-time converter cannot achieve two key performance indicators of wide input swing and high conversion linearity at the same time, which greatly limits its deployment in high performance applications. Disclosure of Invention The invention aims to solve the technical problem that input voltage swing and conversion linearity are mutually restricted in the traditional voltage-time converter circuit, and provides a linear voltage-time converter circuit supporting rail-to-rail input and an implementation method thereof. The core of the invention is that the nonlinearity of the first differential pair (comprising positive and negative differential inputs) of the main input branch is compensated by the auxiliary input branch. For a conventional voltage-to-time converter, which has only a main input branch, there is no auxiliary input branch as proposed by the present invention. When the input voltage swing increases, for example, the positive differential input V in+ of the main input branch approaches the supply voltage, the negative differential input V in- of the main input branch approaches the ground voltage, the negative NMOS transistor of the first differential pair of the main input branch tends to saturate and even enter the linear region, the increase of the discharge current provided by the negative NMOS transistor of the first differential pair of the main input branch slows down, and at the same time the negative NMOS transistor of the first differential pair of the main input branch enters the cut-off region, resulting in the discharge current approaching 0, the voltage of the negative output node in the differential output node changes slowly, the connected output buffer stage needs a longer time to generate level jump, so that the edge time difference of the output is too large, and the output time generates expansibility nonlinearity. In the invention, the auxiliary input branch connected in parallel with the main input branch can play a key role of improving the output linearity under the input of the large-swing voltage. The source follower of the auxiliary input branch has a compressive nonlinear voltage transmission characteristic and a DC level shift characteristic. The voltage input of the voltage-to-time converter is applied to the gates of the second differential input pair after being processed by a source follower with a compressed non-linear characteristic, a dc level shifting characteristic. At the differential output node, the first discharge current from the main input branch and the second discharge current from the auxiliary input branch are added. Under the condition that the firs