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CN-121984520-A - Encoding method, decoding method and communication device

CN121984520ACN 121984520 ACN121984520 ACN 121984520ACN-121984520-A

Abstract

Provided are an encoding method, a decoding method, and a communication device. In the method, the communication device can obtain the check matrix based on the first base matrix, and then perform LDPC encoding or decoding based on the check matrix. The first base matrix comprises a ladder-type structure and a non-zero submatrix positioned at the right lower corner of the first base matrix, the ladder-type structure can support progressive coding and sliding window decoding, and the non-zero submatrix can be used for coding to obtain more check bits, so that error correction is carried out on partial information bits with low decoding accuracy, the overall decoding performance is improved, and the communication reliability is improved.

Inventors

  • LI HANG
  • DONG PENGPENG
  • ZHENG CHEN
  • YE FANGPING

Assignees

  • 华为技术有限公司

Dates

Publication Date
20260505
Application Date
20241031

Claims (19)

  1. 1. A method of encoding, comprising: obtaining a check matrix according to the first base matrix; based on the check matrix, performing low-density parity check (LDPC) coding on the first bit sequence with the first length to obtain a second bit sequence; The first base matrix comprises a first sub-block, a second sub-block and a third sub-block, wherein the first sub-block is H B1sub or a sub-matrix with a row and/or column transformation relation with H B1sub , and the H B1sub meets the following conditions: In the H B1sub , B w is one of W submatrices, W is a positive integer which is more than or equal to 0 and less than W, and W is a positive integer which is more than 1, B 0 comprises columns corresponding to information bits in the first bit sequence, the W submatrices are non-zero submatrices with the same dimension, and 0 represents all-zero submatrices with the same dimension as the B w ; The second sub-block and the third sub-block are located in the same plurality of rows below the first sub-block, the second sub-block is located on the left side of the third sub-block, the last column of the second sub-block does not exceed the last column of the first sub-block, the first column of the third sub-block is continuous with the last column of the first sub-block, the second sub-block comprises one or more sub-matrices except B 0 in the W sub-matrices, the third sub-block is a full-rank square matrix, and the third sub-block does not comprise a column corresponding to information bits in the first bit sequence.
  2. 2. The method of claim 1, wherein the method is applied to a first communication device, the method further comprising: the first base matrix is determined to be used in accordance with one or more of the first length, a traffic type to which the first bit sequence belongs, a code rate, a capability of the first communication device, or a capability of a second communication device in communication with the first communication device.
  3. 3. The method of claim 1 or 2, wherein the method further comprises: And sending first indication information, wherein the first indication information is used for indicating to use the first base matrix or indicating the first base matrix.
  4. 4. The method of claim 1, wherein the method further comprises: and receiving second indication information, wherein the second indication information is used for indicating the first base matrix to be used or is used for indicating the first base matrix.
  5. 5. A method of decoding, comprising: Acquiring a second bit sequence; obtaining a check matrix according to the first base matrix; based on the check matrix, performing low-density parity check (LDPC) decoding on the second bit sequence to obtain a third bit sequence with a first length; The first base matrix comprises a first sub-block, a second sub-block and a third sub-block, wherein the first sub-block is H B1sub or a sub-matrix with a row and/or column transformation relation with H B1sub , and the H B1sub meets the following conditions: In the H B1sub , B w is one of W submatrices, W is a positive integer which is more than or equal to 0 and less than W, and W is a positive integer which is more than 1, B 0 comprises columns corresponding to information bits in the third bit sequence, the W submatrices are non-zero submatrices with the same dimension, and 0 represents all-zero submatrices with the same dimension as the B w ; The second sub-block and the third sub-block are located in the same plurality of rows below the first sub-block, the second sub-block is located on the left side of the third sub-block, the last column of the second sub-block does not exceed the last column of the first sub-block, the first column of the third sub-block is continuous with the last column of the first sub-block, the second sub-block comprises one or more sub-matrices except B 0 in the W sub-matrices, the third sub-block is a full-rank square matrix, and the third sub-block does not comprise a column corresponding to information bits in the third bit sequence.
  6. 6. The method of claim 5, wherein the method is applied to a second communication device, the determining using the first base matrix, comprising: the first base matrix is determined to be used in accordance with one or more of the first length, a traffic type to which the first bit sequence belongs, a code rate, a capability of the second communication device, or a capability of a first communication device in communication with the second communication device.
  7. 7. The method of claim 6, wherein the method further comprises: and sending second indication information, wherein the second indication information is used for indicating to use the first base matrix or indicating the first base matrix.
  8. 8. The method of claim 5, wherein the method further comprises: And receiving first indication information, wherein the first indication information is used for indicating to use the first base matrix or indicating to use the second base matrix.
  9. 9. The method of any of claims 1 to 8, wherein the first base matrix satisfies: wherein [ 00..0B W-1 …B 1 ] is the second sub-block and B T is the third sub-block.
  10. 10. The method according to any one of claims 1 to 9, wherein the third sub-block is a unit diagonal matrix, or a matrix having a row and/or column transform relationship with a unit diagonal matrix, or a double diagonal matrix, or a matrix having a row and/or column transform relationship with a double diagonal matrix, or a lower triangular matrix, or a matrix having a row and/or column transform relationship with a lower triangular matrix.
  11. 11. The method according to any one of claims 1 to 10, wherein W is a predefined value.
  12. 12. The method of any one of claims 1 to 11, wherein W is 2.
  13. 13. The method of any of claims 1 to 12, wherein the number of B 0 in the first sub-block is predefined, configured, or indicated.
  14. 14. The method of claim 13, wherein a number of columns k sub in the B 0 corresponding to the information bits satisfies: Wherein K max is a predefined threshold, K max is a positive integer, Z is the expansion factor of the check matrix, Z is a positive integer, P is the number of B 0 in the first sub-block, and P is a positive integer greater than 1.
  15. 15. The method of any one of claims 1 to 12, wherein the number of columns in the B 0 corresponding to the information bits is predefined, configured, or indicated.
  16. 16. The method of claim 15, wherein the number P of B 0 in the first sub-block satisfies: Wherein K is the first length, K is a positive integer, Z is the expansion factor of the check matrix, Z is a positive integer, K sub is the number of columns corresponding to the information bits in B 0 , and K sub is a positive integer.
  17. 17. A method as claimed in any one of claims 1 to 16, wherein B 0 has a lapril Raptor-like structure.
  18. 18. A communication device comprising functional modules for implementing the method of any one of claims 1 to 17.
  19. 19. A communication device comprising one or more processors and communication circuitry for at least one of input or output of signals by the communication device, the one or more processors to implement the method of any of claims 1-17.

Description

Encoding method, decoding method and communication device Technical Field The present application relates to the field of wireless communications, and in particular, to an encoding method, a decoding method, and a communication device. Background The Low Density Parity Check (LDPC) code is a linear block code with a sparse check matrix. The LDPC code not only has good performance approaching Shannon limit, but also has low decoding complexity and flexible structure. Thus, it has found good application in some communication systems. The Spatial Coupled (SC) -LDPC code combines the ideas of block coding and recursive convolutional coding, and has better decoding performance than the conventional LDPC block code. And is therefore considered a very promising coding scheme. However, the SC-LDPC code is directly applied to the wireless communication system for encoding, but there is a problem that the decoding accuracy of a part of information bits is not high, so that the overall decoding performance is affected. Disclosure of Invention The application provides an encoding method, a decoding method and a communication device, aiming at optimizing an SC-LDPC code, improving the decoding performance and improving the communication reliability. In a first aspect, an encoding method is provided that is applicable to a first communication device having an encoding function. The first communication device may be a communication device, such as a network device or a terminal device, or may be a component configured in the communication device, such as a circuit or a chip (such as a modem (modem) chip, a baseband (baseband) chip, or a system on chip (SoC) chip or a system in a package (SYSTEMIN PACKAGE, SIP) chip including a modem core, or may be a logic module or software capable of implementing part or all of the functions of the first communication device, or the application is not limited thereto. The method comprises the steps of obtaining a check matrix according to a first base matrix, performing LDPC coding on a first bit sequence with a first length according to the check matrix to obtain a second bit sequence, wherein the first base matrix comprises a first subblock, a second subblock and a third subblock, the first subblock is H B1sub or a subblock with a row and/or column transformation relation with H B1sub, and the H B1sub meets the following conditions: In H B1sub, B w is one of W submatrices, W is a positive integer greater than or equal to 0 and less than W, W is a positive integer greater than 1, B 0 includes columns corresponding to information bits in the first bit sequence, the W submatrices are nonzero submatrices with the same dimension, 0 represents all zero submatrices with the same dimension as B w, X represents submatrices with the same dimension as B w, the second and third submatrices are located in the same plurality of rows below the first submatrices, the second and third submatrices are located to the left of the third submatrices, and the last column of the second submatrices does not exceed the last column of the first submatrices, the first column of the third submatrices is continuous with the last column of the first submatrices, the second submatrices include one or more submatrices other than B 0 in the W submatrices, the third submatrices are full-rank square matrices, and the third submatrices do not include columns corresponding to information bits in the first bit sequence. In the first base matrix, X in different positions can be the same or different, and X in each position can be an all-zero submatrix or a non-zero submatrix. The application is not limited in this regard. Since the check matrix can be obtained by matrix-dimensional expansion based on the first base matrix and used for encoding the first bit sequence. For convenience of explanation, the first bit sequence will be sometimes encoded based on a check matrix obtained from the first base matrix, which will be simply referred to as encoding the first bit sequence based on the first base matrix. In the first base matrix, a column corresponding to the information bits in the first bit sequence is included in B 0, that is, the encoded bits obtained by encoding the first bit sequence based on B 0 may include the information bits and the check bits, and the third sub-block does not include a column corresponding to the information bits in the first bit sequence, that is, the encoded bits obtained by encoding the first bit sequence based on the third sub-block include the check bits and the information bits. The first bit sequence has a first length, in other words, the first bit sequence is a bit sequence of a finite length. The first bit sequence may include, for example, information bits in one Code Block (CB), or may include information bits in a plurality of CBs, or alternatively, the first bit sequence may further include cyclic redundancy check (cyclic redundancy check, CRC) codes (hereinafter referred to as chec