CN-121984533-A - Message storage type LEU of switching value condition safety acquisition structure
Abstract
The invention discloses a message storage LEU of a switching value condition safety acquisition structure, which comprises two independent power supply MCUs, wherein the two MCUs safely and synchronously acquire external switching value conditions, carry out validity judgment on the conditions, respectively select messages corresponding to the conditions from independent message memories after the judging conditions are valid, safely transmit the corresponding messages to an FPGA, output the messages in a DBPL coding mode by the FPGA, support four-channel message output by the LEU, adopt 5 independent FPGAs, wherein the FPGAs 1-4 respectively finish the coding output of 4 channels of messages, carry out backstheck check on the 4 channels of messages by the FPGA5, and carry out consistency check on the backstheck messages obtained by the double MCUs through periodic communication with the FPGA5 respectively and the selected messages. The invention has the technical advantages that the FPGA does not execute the safety structure of the safety function, the MCU supports the safety acquisition of 64 paths of switching value conditions, and the LEU message data configuration process is simplified.
Inventors
- AN DONG
- ZHAO YANG
- ZHOU LISHENG
- RAN NANA
Assignees
- 北京交大思诺科技股份有限公司
Dates
- Publication Date
- 20260505
- Application Date
- 20251223
Claims (7)
- 1. The message storage type LEU of the switching value condition safety acquisition structure comprises two independent power supply MCUs, wherein the two MCUs safely and synchronously acquire external switching value conditions, the validity of the conditions is judged, after the validity of the conditions is judged, messages corresponding to the conditions are selected from independent message memories respectively, the corresponding messages are safely transmitted to an FPGA, and the FPGA outputs the messages in a coding mode of a differential bidirectional level code (DBPL); The security acquisition architecture adopts 5 independent FPGAs, wherein 4 FPGAs (FPGAs 1-4) respectively finish the encoding output of 4 paths of messages, 5 th FPGAs (FPGAs 5) carry out check-back check on the 4 paths of messages, double MCUs respectively carry out periodic communication with the 5 th FPGAs to obtain the checked messages and carry out consistency check with the selected messages, and the FPGAs do not bear the security function.
- 2. The message storage type LEU according to claim 1, wherein the dual MCUs realize a message selecting function, after the dual MCUs select a message to be sent, the dual MCUs transmit half-packet message data to corresponding FPGAs 1-4, respectively, and after the FPGAs 1-4 splice the message into a complete message, the DBPL code is independently output, the FPGA5 performs read-back buffering on the message output by FPGAs 1-4, and the dual MCUs respectively periodically read back 4 paths of message data to the FPGA5 and perform consistency verification with the message to be sent.
- 3. The message storage type LEU according to claim 2 is characterized in that the FPGA 1-4 receives message data sent by two MCUs, only one message to be sent currently is locally cached, when the FPGA 1-4 fails, the FPGA5 sends back the old message to the two MCUs, the two MCUs perform message consistency check to confirm abnormal message output, when the FPGA5 fails, the FPGA5 sends back the old message to the two MCUs, the two MCUs can also detect abnormal conditions, any failure of the FPGA can detect the abnormal conditions through the reaction mode, the two MCUs jointly output a safety control signal, and the LEU message output is turned off.
- 4. The message storage type LEU according to claim 1, wherein the collection function of 64 switching value conditions is performed by a double MCU, the double MCU sends 4 paths of dynamic square waves to 4 signal collection boards respectively, each signal collection board supports 16 paths of switching value conditions to be converted into dynamic square waves, and carries out parallel-serial conversion on 16 paths of dynamic square waves, and the two MCUs can control parallel-serial conversion circuits of the 4 signal collection boards through timer interruption time sharing to safely collect 64 paths of switching value conditions.
- 5. The message storage type LEU according to claim 4, wherein the dual MCUs drive parallel-serial conversion circuits in the 4 signal acquisition boards through a time-division multiplexing standard SPI interface in the process of transmitting dynamic square waves, sequentially acquire parallel-serial converted data of the 4 signal acquisition boards, and design a preamble code in the parallel-serial conversion circuits to facilitate the MCU to recognize data channels, thereby avoiding disorder of acquired data.
- 6. The message storage type LEU according to claim 5, wherein the dual MCUs process the sequentially collected data in each time slice period, extract collected switching value input conditions therefrom, perform stability judgment in a mode of majority judgment for each switching value input condition, and select a message corresponding to each switching value input condition according to the condition after stability judgment.
- 7. The message storage type LEU according to claim 1, characterized in that, the LEU message data configuration process is simplified, bootloader program of the MCU is introduced, the MCU can enter into data configuration mode when power-on initialization by controlling power-on time sequence of Bootloader and main program, the LEU message data configuration is carried out by the LEU message configuration tool, and the LEU can work normally after the data configuration is completed.
Description
Message storage type LEU of switching value condition safety acquisition structure Technical Field The invention relates to a message storage type ground electronic unit (LEU) in a transponder transmission system. Background In the transponder transmission system, the message storage type LEU can select the message stored in the LEU corresponding to the condition by directly collecting the switching value condition of the relay interlocking equipment, and the message is safely transmitted to the active transponder. When the condition of the acquired switching value is used as input, the LEU can support the acquisition of 64 paths of switching value conditions at maximum, the acquisition of the conditions accords with the fault-safety principle, the LEU adopts a double-FPGA combined fault-safety structure for realizing the safety acquisition function of the external switching value condition, the double-FPGA acquires the switching value condition, performs two-out-of-two voting after the completion, selects the corresponding message, and performs message output and message rechecking after the message is selected. In the safety structure of the LEU, the double FPGAs all bear the safety function, so that a strict safety check mechanism is introduced in the FPGA design, safety constraint is carried out in the FPGA development full-chain process, and the flexibility and instantaneity of the FPGA design are limited. Especially when the LEU safety function is maintained and upgraded, the development difficulty is increased increasingly, and the maintenance cost is increased remarkably. In order to realize the safety acquisition function of the switching value condition and simultaneously decouple the safety function from the non-safety function, a combined fault-safety structure consisting of double MCUs is required to be designed, and the FPGA does not bear the safety function. Disclosure of Invention The invention simplifies the LEU safety structure for improving the maintainability of the LEU system, and realizes a design structure for executing the safety function by combining double MCU. The invention provides a message storage type LEU of a switching value condition safety acquisition structure, which comprises two independent power supply MCUs, wherein the two MCUs safely and synchronously acquire external switching value conditions, carry out validity judgment on the conditions, respectively select messages corresponding to the conditions from independent message memories after judging that the conditions are valid, safely transmit the corresponding messages to an FPGA, and output the messages in a coding mode of a differential bidirectional level code (DBPL) by the FPGA; The security acquisition architecture adopts 5 independent FPGAs, wherein 4 FPGAs (FPGAs 1-4) respectively finish the encoding output of 4 paths of messages, 5 th FPGAs (FPGAs 5) carry out check-back check on the 4 paths of messages, double MCUs respectively carry out periodic communication with the 5 th FPGAs to obtain the checked messages and carry out consistency check with the selected messages, and the FPGAs do not bear the security function. The technical advantages of the scheme of the invention are as follows: (1) A security structure in which the FPGA does not perform a security function; (2) The MCU supports 64 paths of switching value condition safety collection; (3) Simplifying LEU message data configuration process. Drawings FIG. 1 is a security architecture design of an LEU; Fig. 2 is a LEU message data configuration process. Detailed Description The present invention will be described in detail with reference to specific examples. The following examples will assist those skilled in the art in further understanding the present invention, but are not intended to limit the invention in any way. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the scope of the invention. The LEU safety architecture is shown in figure 1, and is formed by combining two independent power supply MCUs, the double MCUs safely and synchronously acquire external switching value conditions, the double MCUs judge the validity of the conditions, after judging that the conditions are valid, the double MCUs respectively select messages corresponding to the conditions from independent message memories (FLASH), the corresponding messages are safely transmitted to an FPGA, and the FPGA outputs the messages in a coding mode of differential bidirectional level codes (DBPL). The LEU supports four-channel message output capability, 5 independent FPGAs are adopted in the structural design, wherein 4 FPGAs (FPGAs 1-4) respectively finish the code output of 4 channels of messages, 1 FPGA (FPGA 5) carries out check-back verification on the 4 channels of messages, and the double MCUs respectively communicate with the FPGA5 periodically to obtain the checked messages and