CN-121984813-A - Boud rate clock data recovery method based on light-weight equalization assistance

CN121984813ACN 121984813 ACN121984813 ACN 121984813ACN-121984813-A

Abstract

The invention provides a clock data recovery method based on light equalizer assistance, which comprises the steps of interpolating an input digital signal by using an interpolation filter, outputting a resampled signal according to interpolation phase information provided by a numerical control oscillator, equalizing the resampled signal by using a feedforward equalizer FFE, inputting the FFE output signal to a single-tap noise canceller for preliminary compensation of channel damage, restraining noise enhancement introduced by FFE by subtracting weighted adjacent symbol decision errors, obtaining a signal after noise elimination, inputting the signal after noise elimination to a Mueller-Muller timing error detector MM-TED, extracting timing error information, filtering the timing error information by using a loop filter, controlling the numerical control oscillator, and adjusting the interpolation phase of the interpolation filter to complete CDR closed loop. The invention can effectively inhibit noise enhancement caused by FFE in the CDR loop, obviously improve the detection precision of time sequence errors and improve the transmission performance of the system.

Inventors

ZHOU JIAHAO
ZHAO XUE
LI JINJIANG
HU SHAOHUA
ZHANG JING
XU BO
QIU KUN

Assignees

电子科技大学
天府绛溪实验室

Dates

Publication Date: 20260505
Application Date: 20260323

Claims (5)

1. The clock data recovery method based on the light equalizer is characterized in that the clock data recovery CDR process in the digital signal processing of the receiving end comprises the following steps: Interpolation step, interpolation filter is used to interpolate the input digital signal, and sampling signal is output according to interpolation phase information provided by the numerical control oscillator; A feedforward equalization step of equalizing the resampled signal by using a feedforward equalizer FFE and outputting an equalized signal to preliminarily compensate channel damage; The noise elimination step is that the balanced signal is input to a single-tap noise eliminator NC, and the noise eliminated signal is obtained by subtracting the weighted adjacent symbol decision error, so that the noise enhancement introduced by a feedforward equalizer is inhibited; A timing error detection step, namely inputting the signals after noise elimination to a Mueller-Muller timing error detector MM-TED, and extracting timing error information; And a loop updating step, namely controlling a numerical control oscillator NCO after filtering the time sequence error information through a loop filter, adjusting the interpolation phase of an interpolation filter, and completing clock data recovery closed loop.
2. The method of claim 1, wherein the specific calculation formula of the noise cancellation step is: y 1 (n)=y(n)-αe(n-1); wherein y 1 (n) is the output signal after noise cancellation at time n, y (n) is the output signal of the feedforward equalizer at time n, α is the noise whitening factor, and e (n-1) is the decision error at time n-1.
3. The method according to claim 2, wherein the calculation method of the decision error e (n-1) is: e(n-1)=d(n-1)-y(n-1) ; wherein d (n-1) is a hard decision value of the feedforward equalizer output signal y (n-1) at the time of n-1 after decision by a decision device.
4. The method of claim 2, wherein the noise whitening factor α is adaptively updated based on a correlation of the error signal, the calculating method being: α=E[e(n)e(n-1)]/E[e(n)e(n)]; where E represents the desired operation.
5. The method of claim 1, wherein the noise canceller is substantially equivalent to performing a low pass filtering operation responsive to 1+αD on the output of the feedforward equalizer to suppress high frequency noise while subtracting intersymbol interference introduced by the low pass filtering operation, wherein D represents a delay of a single symbol interval.

Description

Boud rate clock data recovery method based on light-weight equalization assistance Technical Field The present invention relates to an optical fiber communication technology, and in particular, to a clock data recovery technology for directly detecting an optical fiber communication system. Background With the improvement of the demand of the artificial intelligence computing cluster on the data exchange efficiency, the next-generation optical module rate is expected to evolve to single wave 200 Gb/s or even higher. In high speed transmission, the bandwidth limitation and severe intersymbol interference ISI introduced by low cost optoelectronic devices are major challenges. At the receiving end, a digital signal processing DSP algorithm, such as a decision feedback equalizer DFE or maximum likelihood sequence estimation MLSE, is typically employed to compensate for transmission impairments. However, the clock and data recovery CDR serves as a front-end key module of the DSP, and its performance directly determines whether the subsequent DSP module can work normally. To reduce power consumption and cost, a Mueller-Muller timing error detector MM-TED for baud rate sampling is widely used. However, in high-speed systems, severe ISI can cause the noise at the MM-TED output to increase significantly, thereby reducing the jitter tolerance of the CDRs. Although a low tap feedforward equalizer FFE is typically introduced in the CDR loop to primarily compensate for ISI, FFE inevitably amplifies high frequency noise while compensating for high frequency attenuation. This enhanced noise may be transferred to the TED output, resulting in a degraded signal-to-noise ratio for the timing extraction. Although the traditional DFE or MLSE has excellent performance, the traditional DFE or MLSE cannot meet the severe requirement of a CDR loop on low delay due to a complex feedback structure or huge calculation amount to generate larger delay. Therefore, a low complexity, low latency method that effectively suppresses FFE noise enhancement is needed to improve CDR performance. Disclosure of Invention The technical problem to be solved by the invention is to provide a clock data recovery scheme aiming at the defect that noise enhancement is introduced while FFE (FFE) compensates inter-symbol interference in a clock data recovery CDR loop of a high-speed optical communication system, so that the detection precision of MM-TED (minimum-mean-time-delay) of a subsequent Mueller-Muller time-sequence error detector is reduced, and the traditional decision feedback equalizer or maximum likelihood sequence estimation can effectively inhibit noise but delay is overlarge, so that the harsh requirement of the CDR loop on low-delay processing is difficult to meet. The technical scheme adopted by the invention for solving the technical problems is that the method for recovering the baud rate clock data based on the light-weight balanced auxiliary comprises the following steps of: interpolation step, interpolation filter is used to interpolate the input digital signal, and output the baud rate resampling signal; The step of equalization and noise elimination, in which the resampled signal is firstly subjected to linear equalization by a feedforward equalizer FFE, and then enters a single-tap noise eliminator NC, and the noise eliminator eliminates the high-frequency noise enhancement introduced by FFE by subtracting the decision error of the weighted previous symbol from the current FFE output symbol; And in the time sequence extraction and updating step, the signals after noise elimination are input into a Mueller-Muller time sequence error detector MM-TED to calculate time sequence errors, and the error signals are processed by a loop filter and then control a numerical control oscillator NCO so as to adjust interpolation phases. The core logic of the noise canceller is to correct the signal by utilizing the decision error information of the previous symbol, realize the noise suppression effect similar to low-pass filtering under extremely low computational complexity, and cancel the extra ISI introduced by filtering through subtraction operation. The invention can effectively inhibit the noise enhancement effect brought by FFE in the CDR loop by introducing the lightweight noise eliminator which only needs one multiplication and one addition, improves the gain of the time sequence error detector, obviously enhances the robustness of the CDR in a severe bandwidth limited scene, and is very suitable for being integrated in a high-speed CDR loop due to extremely low delay. The beneficial effects of the invention are as follows: 1. inhibiting FFE noise enhancement and remarkably improving time sequence detection precision And a single-tap noise canceller is introduced after FFE and before MM-TED, and the previous symbol decision error is utilized for weighting correction, so that noise amplification introduced when FFE compensates high-frequenc