CN-121984873-A - COE interconnection simulation method, system and medium based on DPDK and all-user-mode protocol stack

CN121984873ACN 121984873 ACN121984873 ACN 121984873ACN-121984873-A

Abstract

The embodiment of the invention discloses a COE interconnection simulation method, a system and a medium based on DPDK and an all-user-state protocol stack. The method comprises the steps of constructing a user state simulation environment comprising a DPDK driver and an all-user state network protocol stack on at least two nodes of network interconnection, packaging a memory access request of CXL protocol into frame data conforming to a preset format, adding a network layer and a transmission layer protocol header through the all-user state network protocol stack to form an Ethernet data frame, submitting the Ethernet data frame to a physical network card through a DPDK interface for transmission, receiving the Ethernet data frame from the physical network card through the DPDK interface, stripping the network layer and the transmission layer protocol header through the all-user state network protocol stack, de-packaging to obtain CXL protocol data, performing response processing according to the de-packaged CXL protocol data, generating acknowledgement information when needed, and transmitting the acknowledgement information to a peer node through the all-user state network protocol stack and the DPDK interface.

Inventors

WANG BO
WANG SHANLONG
JIA YU
QIAN LING

Assignees

中移(苏州)软件技术有限公司
中国移动通信集团有限公司

Dates

Publication Date: 20260505
Application Date: 20251231

Claims (10)

1. The COE interconnection simulation method based on the DPDK and the all-user-state protocol stack is characterized by comprising the following steps: Constructing a user state simulation environment comprising a DPDK drive and an all user state network protocol stack on at least two nodes interconnected by a network, wherein the simulation environment comprises a CXL agent module and an Ethernet processing module; Encapsulating a memory access request of CXL protocol into frame data conforming to a preset format, and adding a network layer and a transmission layer protocol header through the all-user-state network protocol stack to form an Ethernet data frame; Submitting the Ethernet data frame to a physical network card through a DPDK interface for transmission; Receiving an Ethernet data frame from a physical network card through a DPDK interface, stripping a network layer protocol header and a transport layer protocol header by the all-user-state network protocol stack, and decapsulating to obtain CXL protocol data; and carrying out response processing according to the unpacked CXL protocol data, generating acknowledgement information when required, and sending the acknowledgement information to a peer node through the all-user network protocol stack and a DPDK interface.
2. The method for simulating COE interconnection based on DPDK and all-user-state protocol stacks according to claim 1, wherein the step of constructing a user-state simulation environment including DPDK drivers and all-user-state network protocol stacks further comprises: Initializing a DPDK polling driver, binding a physical network card, and configuring a memory pool and queue resources; Loading a full user state network protocol stack for realizing protocol processing logic in a user space, and interfacing with the DPDK driver; and starting the CXL agent module and the Ethernet processing module, wherein the CXL agent module is used for processing CXL protocol logic and equipment states, and the Ethernet processing module is used for executing encapsulation and decapsulation of network data.
3. The method for simulating COE interconnection based on DPDK and full user mode protocol stack according to claim 1, wherein the step of encapsulating the memory access request of CXL protocol into frame data conforming to a predetermined format further comprises: the CXL agent module assembles the received access request aiming at the remote memory into one or more stream frames according to a preset format, wherein the head of the stream frame comprises a stream identifier, the offset of the frame in the stream and the data length; And adding a COE data packet header to the stream frame through the Ethernet processing module, wherein the COE data packet header comprises a message type identifier and a packet sequence number to form a COE protocol data unit.
4. The method for simulating COE interconnection based on DPDK and full user state protocol stacks according to claim 3, wherein the step of performing response processing according to the decapsulated CXL protocol data further comprises: The Ethernet processing module extracts stream frames from the COE protocol data unit, and sequences and reorganizes a plurality of stream frames belonging to the same stream according to the stream identifier and the offset in the head of the stream frames; Delivering the recombined complete data to the CXL agent module; And the CXL agent module updates the state of the local virtual equipment or returns a response to the application layer according to the complete data.
5. The method of claim 1, wherein the acknowledgement information is encapsulated as an acknowledgement frame containing a maximum acknowledgement packet number and one or more acknowledgement block structures describing the sequence of received data packets.
6. The COE interconnection simulation system based on the DPDK and the all-user-state protocol stack is characterized by comprising: The CXL proxy module is configured to simulate CXL equipment logic and process memory access requests and responses; The Ethernet processing module is communicated with the CXL agent module and is configured to perform network protocol encapsulation on data from the CXL agent module and decapsulate the received network data; the DPDK and the full user mode network protocol stack operating environment are configured to provide user mode driving of the physical network card and network protocol processing capacity of a user space; And the Ethernet processing module calls the all-user network protocol stack to execute protocol header adding and stripping, and sends and receives network data frames through a DPDK running environment.
7. The DPDK and all user state protocol stack based COE interconnect emulation system of claim 6, wherein the CXL agent module further comprises: The request processing unit is configured to analyze the target address of the memory access request and distinguish local access from remote access; The address mapping unit is configured to maintain the mapping relation between CXL equipment addresses and network addresses; and the data assembling unit is configured to assemble the memory access request or response into data conforming to a predetermined frame format.
8. The DPDK and all user state protocol stack based COE interconnect emulation system of claim 6, wherein the ethernet processing module further comprises: an encapsulation/decapsulation unit configured to convert between a stream frame and a COE data packet, the COE data packet including header data for indicating a packet type and a packet sequence number; And the stream management unit is configured to manage the received stream frames, perform sequencing and reassembly and generate acknowledgement frames.
9. The system for simulating COE interconnection based on DPDK and full user state protocol stacks of claim 6, wherein said DPDK and full user state network protocol stack operating environment further comprises: the DPDK driving and managing unit is configured to operate the physical network card in a polling mode and manage a data packet buffer area and a queue; And the user state protocol processing unit is configured to realize processing logic at least comprising Ethernet, IP and UDP protocols in the user space.
10. A computer readable storage medium having stored thereon computer instructions which, when run, perform the method of DPDK and full user mode protocol stack based COE interconnect emulation according to any one of claims 1 to 5.

Description

COE interconnection simulation method, system and medium based on DPDK and all-user-mode protocol stack Technical Field The application relates generally to the technical field of computer network communication, and in particular relates to a COE interconnection simulation method, system and medium based on DPDK and an all-user-state protocol stack. Background Computing fast links (Compute Express Link, CXL) are an emerging high-speed processor interconnect protocol with the core advantage of being able to provide high bandwidth, low latency interconnect capabilities for CPUs, GPUs, memories and accelerators, and support cache coherency, has become one of the key technologies for building high performance computing systems. However, conventional CXL protocols are designed primarily for short-range interconnections within server enclosures or single cabinets, with physical implementation severely dependent on dedicated hardware interfaces and links. This reliance on specific hardware greatly limits the application of CXL technology in large-scale data centers, cloud computing environments, and scenarios where efficient data exchange and resource pooling across cabinets or even across data centers is required. To break through the above limitations of physical distance and topology flexibility, the industry has proposed CXL Over Ethernet (COE) technical concepts. The COE aims to map the transactional semantics and memory access model of the CXL protocol higher layer onto a widely deployed, highly standardized ethernet infrastructure. In this way, the COE enables the servers and the devices in different physical positions to communicate through the standard Ethernet, and realizes the direct access and memory resource pooling of remote memories across cabinets and across data centers, thereby remarkably improving the resource utilization rate, flexibility and expandability of the data centers and providing a new solution for large-scale calculation, storage and data processing. Despite the wide prospects of the COE technology, its development is still in an early stage, facing many challenges. Currently, for implementation and verification of the COE model, existing schemes are basically focused on hardware schemes such as customized application specific integrated circuits or field programmable gate arrays. Although the hardware implementation mode can perform principle verification, the inherent defects of high research and development cost, long design period, difficult modification of architecture solidification and the like are generally accompanied, and the agile iteration requirements for protocol design, performance tuning and system verification in the early stage of rapid technology evolution cannot be met. In contrast, the current dominant technology for achieving high performance remote memory access in data centers is remote direct memory access. RDMA, while effective in reducing CPU overhead for network communications, has a protocol stack and memory semantics that are not natively designed for cache coherency, and still has a gap from local or CXL-based accesses in terms of access latency, bandwidth efficiency, and compactness of co-operation with processor caches. COE technology is considered potentially providing a performance experience that is closer to local memory access, but currently lacks a mature, efficient implementation to fully verify and demonstrate this advantage, both at the hardware and software level. Furthermore, implementing COE or any high performance network transport faces a bottleneck, the traditional operating system kernel network protocol stack. When the kernel protocol stack processes network data packets, unavoidable context switching, system call and multiple data copying can introduce significant delay and CPU overhead, and the performance ceiling is difficult to meet microsecond or even sub microsecond ultra-low delay and high throughput data transmission requirements pursued by COE. In summary, the prior art has the following outstanding contradiction and problems of (1) the contradiction between the advanced concept of the COE and the current implementation path depending on high-cost and long-period custom hardware, (2) the contradiction between the potential high-performance advantage of the COE and the lack of an efficient and flexible software simulation verification platform, and (3) the contradiction between the requirement of the COE on the extreme network performance and the performance bottleneck of the traditional kernel network protocol stack. Therefore, a software simulation method capable of overcoming the limitation of hardware implementation and bypassing the performance bottleneck of the kernel is urgently needed to accelerate the research and development, verification and floor application of the COE technology in a low-cost and high-efficiency manner. Disclosure of Invention Aiming at some defects related in the background technology, the embodi