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CN-121985233-A - Short-wave infrared pixel reading circuit and control method thereof

CN121985233ACN 121985233 ACN121985233 ACN 121985233ACN-121985233-A

Abstract

The invention provides a short-wave infrared pixel reading circuit and a control method thereof, wherein the short-wave infrared pixel reading circuit converts an optical signal into photocurrent based on a photoelectric conversion module, provides preset transconductance gain through a symmetrical differential amplification structure in a charge integration amplification module, amplifies the photocurrent based on the preset transconductance gain, and integrates the photocurrent to obtain an integrated voltage; and carrying out reset sampling and signal sampling on the integrated voltage through a correlated double sampling module to obtain a sampling voltage. The short-wave infrared pixel reading circuit provided by the invention adopts a symmetrical differential amplification input structure, has higher common mode rejection ratio, has better anti-interference capability, improves the anti-interference capability of an amplification process under the condition of not increasing power consumption, and has the advantages that related double sampling modules are concentrated in the reading circuit, signals are not transmitted between pixels and column-level circuits for multiple times, the processing pressure of the column-level circuits is reduced, the number of circuit switches is small, the time sequence control is simple, and the pixel area is reduced.

Inventors

  • CUI DAJIAN
  • XI SHUIQING
  • TANG JIE
  • LIU JIAYANG
  • GAO RUOYAO
  • Zhou Aishi
  • REN LI

Assignees

  • 中国电子科技集团公司第四十四研究所

Dates

Publication Date
20260505
Application Date
20260228

Claims (8)

  1. 1. A short-wave infrared pixel readout circuit, comprising: The photoelectric conversion module is used for converting the optical signal into photocurrent; The charge integration amplifying module is connected with the photoelectric conversion module, provides preset transconductance gain based on a symmetrical differential amplifying structure, amplifies the photocurrent based on the preset transconductance gain, and integrates the electric charge of the photocurrent to obtain an integrated voltage; And the correlated double sampling module is connected with the charge integration amplification module and is used for carrying out reset sampling and signal sampling on the integrated voltage so as to output a sampling voltage representing the intensity of the optical signal.
  2. 2. The short-wave infrared pixel readout circuit according to claim 1, wherein the charge integration and amplification module includes an integration unit and an amplification unit, the amplification unit provides a preset transconductance gain based on the symmetrical differential amplification structure, the photocurrent is amplified based on the preset transconductance gain, the integration unit is coupled between an input terminal and an input terminal of the amplification unit, and the integration unit integrates the charge of the photocurrent.
  3. 3. The short-wave infrared pixel readout circuit according to claim 2, wherein the integration unit comprises a first PMOS tube and a first capacitor, a drain electrode of the first PMOS tube is connected to a first end of the first capacitor, a source electrode of the first PMOS tube is connected to a second end of the first capacitor, a first end of the first capacitor is connected to a negative phase input end of the amplifying unit, and a second end of the first capacitor is further connected to an output end of the amplifying unit, wherein a gate electrode of the first PMOS tube is connected to a first reset signal.
  4. 4. The short-wavelength infrared pixel readout circuit according to claim 2, wherein the charge integration amplification module further comprises a second PMOS transistor and a second capacitor, the amplification unit comprises a third PMOS transistor, a fourth PMOS transistor, a fifth PMOS transistor, a sixth PMOS transistor, a seventh PMOS transistor, a first NMOS transistor, a second NMOS transistor, a fourth NMOS transistor, and a fifth NMOS transistor, the source of the second PMOS transistor is connected to the negative phase input terminal of the amplification unit, the drain of the second PMOS transistor is connected to the positive phase input terminal of the amplification unit, the source of the third PMOS transistor is connected to the source of the fourth PMOS transistor, the source of the fourth PMOS transistor is connected to the source of the fifth PMOS transistor, the drain of the fourth PMOS transistor is connected to the source of the seventh PMOS transistor, the drain of the fifth PMOS transistor is connected to the drain of the third PMOS transistor, the drain of the seventh PMOS transistor is connected to the drain of the NMOS transistor, the drain of the seventh PMOS transistor is connected to the source of the fifth PMOS transistor, the drain of the seventh PMOS transistor is connected to the NMOS transistor, the drain of the seventh PMOS transistor is connected to the drain of the NMOS transistor, the drain of the seventh PMOS transistor is connected to the source of the seventh PMOS transistor, the drain of the seventh PMOS transistor is connected to the NMOS transistor, and the drain of the seventh PMOS transistor is connected to the source of the seventh PMOS transistor, and the drain is connected to the source of the fifth PMOS transistor. The grid of the fourth PMOS tube is the positive phase input end of the amplifying unit, the grid of the fifth PMOS tube is the negative phase input end of the amplifying unit, the drain of the seventh PMOS tube is the output end of the amplifying unit, the grid of the sixth PMOS tube is the first bias input end of the amplifying unit, the grid of the first NMOS tube is the second bias input end of the amplifying unit, the grid of the second PMOS tube is connected with a first reset signal, and the grid of the fifth NMOS tube is the third bias input end of the amplifying unit.
  5. 5. The short-wave infrared pixel readout circuit of claim 1, wherein the photoelectric conversion module comprises a photodiode, a cathode of the photodiode is connected to a power supply voltage, and an anode of the photodiode is an output end of the photoelectric conversion module.
  6. 6. The short-wave infrared pixel readout circuit according to claim 1, wherein the related double sampling module comprises an eighth PMOS tube, a ninth PMOS tube, a sixth NMOS tube, a third capacitor and a fourth capacitor, wherein a drain electrode of the eighth PMOS tube is connected to a source electrode of the sixth NMOS tube, a source electrode of the eighth PMOS tube is connected to a drain electrode of the sixth NMOS tube, a source electrode of the eighth PMOS tube is connected to a first end of the third capacitor, a first end of the third capacitor is grounded after passing through the fourth capacitor, a source electrode of the ninth PMOS tube is connected to a reference voltage, a drain electrode of the ninth PMOS tube is connected to a second end of the third capacitor, a gate electrode of the eighth PMOS tube is connected to a second reset signal, a gate electrode of the sixth NMOS tube is connected to a third reset signal, a gate electrode of the ninth PMOS tube is connected to a fourth reset signal, a second end of the third capacitor is an output end of the related double sampling module, and the second reset signal is inverted with the third reset signal.
  7. 7. The control method of the short-wave infrared pixel reading circuit is characterized by comprising the following steps of: converting the optical signal into a photocurrent; Amplifying the photocurrent based on a preset transconductance gain, and simultaneously integrating charges of the photocurrent to obtain an integrated voltage; And carrying out reset sampling and signal sampling on the integrated voltage to obtain a sampling voltage.
  8. 8. The method of claim 7, further comprising, prior to converting the optical signal to a photocurrent: Acquiring a reset signal; and resetting the short-wave infrared pixel reading circuit based on the reset signal.

Description

Short-wave infrared pixel reading circuit and control method thereof Technical Field The invention relates to the technical field of photoelectric imaging detectors, in particular to a short-wave infrared pixel reading circuit and a control method thereof. Background The short wave infrared imaging technology is widely applied to the technical fields of night vision, remote sensing, industrial detection, spectral analysis and the like due to unique advantages. The short wave infrared imaging is different from the medium-long wave infrared imaging generated by relying on the self heat radiation of an object, has the advantage of being obviously different from the visible light imaging, can obtain a high-contrast image particularly in a low-light environment, has strong smoke penetrating capacity, and plays an important role in target detection in a special environment. The pixel reading circuit is a key component for connecting the front-end photosensitive detector and the rear-end signal processing system, and the performance of the pixel reading circuit directly determines the core indexes such as signal-to-noise ratio, dynamic range, frame rate, power consumption and the like of the whole imaging system. At present, in the existing readout circuit structure, the capacitive feedback transimpedance amplifier pixel structure is widely applied to short-wave infrared weak light signal readout due to high injection efficiency and accurate bias control capability. However, existing sensing circuits based on capacitive feedback transimpedance amplifiers still suffer from significant drawbacks in pursuing high performance metrics. In particular, in terms of noise suppression, the traditional correlated double sampling technology is mostly implemented in a column-level circuit, although the architecture simplifies the pixel design, weak signals are transmitted through long lines, crosstalk and parasitic noise are easy to introduce, the improvement of signal-to-noise ratio is severely restricted, and meanwhile, complicated column-level time sequence control also increases power consumption and limits the frame rate. In the design of the core amplifying unit, in order to meet the requirements of small pixel area and low power consumption, the gain of the traditional amplifier structure is often limited, and the low-frequency noise and offset voltage of the traditional amplifier structure are difficult to effectively inhibit. As the requirements of application scenarios on imaging systems continue to increase, the prior art often trades for increases in other metrics by sacrificing one or more of the performance. Disclosure of Invention The invention provides a short-wave infrared pixel reading circuit and a control method thereof, which are used for solving the technical problems of high noise, high frame rate, high power consumption and the like in the pixel reading circuit. In a first aspect, the present invention provides a short-wave infrared pixel readout circuit, comprising: The photoelectric conversion module is used for converting the optical signal into photocurrent; The charge integration amplifying module is connected with the photoelectric conversion module, provides preset transconductance gain based on a symmetrical differential amplifying structure, amplifies the photocurrent based on the preset transconductance gain, and integrates the electric charge of the photocurrent to obtain an integrated voltage; And the correlated double sampling module is connected with the charge integration amplification module and is used for carrying out reset sampling and signal sampling on the integrated voltage so as to output a sampling voltage representing the intensity of the optical signal. In an embodiment of the invention, the charge integration amplifying module includes an integrating unit and an amplifying unit, the amplifying unit provides a preset transconductance gain based on the symmetrical differential amplifying structure, amplifies the photocurrent based on the preset transconductance gain, the integrating unit is coupled between an input end and an input end of the amplifying unit, and the integrating unit integrates the charge of the photocurrent. In an embodiment of the invention, the integrating unit includes a first PMOS transistor and a first capacitor, a drain electrode of the first PMOS transistor is connected to a first end of the first capacitor, a source electrode of the first PMOS transistor is connected to a second end of the first capacitor, a first end of the first capacitor is connected to a negative phase input end of the amplifying unit, and a second end of the first capacitor is also connected to an output end of the amplifying unit, where a gate electrode of the first PMOS transistor is connected to a first reset signal. In an embodiment of the invention, the charge integration amplifying module further includes a second PMOS tube and a second capacitor, the amplifying unit includes