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CN-121985282-A - Wafer-level acoustic function test method and supporting substrate

CN121985282ACN 121985282 ACN121985282 ACN 121985282ACN-121985282-A

Abstract

The application provides a wafer-level acoustic function testing method and a supporting substrate, and relates to the technical field of wafer-level testing. The method comprises the steps of providing an acoustic sensor wafer with a protective structure on the surface, thinning the acoustic sensor wafer, providing a supporting substrate, attaching the acoustic sensor wafer and the supporting substrate through an adhesive material to form a bonding wafer, wherein the supporting substrate is provided with a through hole opening and a first grooving structure, the position of the through hole opening corresponds to the position of a functional area of the wafer, the first grooving structure corresponds to the position of a cutting channel of the wafer, placing the bonding wafer on a cutting workpiece, removing the protective structure on the surface, cutting a substrate of the acoustic sensor wafer along the cutting channel until the adhesive material or the supporting substrate is exposed, and finally taking the bonding wafer off the cutting workpiece and performing wafer-level acoustic function test. The scheme of the application has the advantages of taking into account the acoustic fidelity, the wafer-level operation robustness and the acoustic isolation between chips.

Inventors

  • LV JUN
  • SHAO CHANGZHI
  • JIN KE
  • SHAN GUANGBAO
  • ZHENG YANWEN
  • YANG CHUNYU
  • YANG PEIPEI
  • JI PING

Assignees

  • 苏州科阳半导体有限公司
  • 西安电子科技大学

Dates

Publication Date
20260505
Application Date
20260408

Claims (10)

  1. 1. A wafer level acoustic function testing method, the method comprising: Providing an acoustic sensor wafer with a protective structure on the surface, and thinning the acoustic sensor wafer, wherein the acoustic sensor wafer is provided with cutting channels and a plurality of acoustic sensor chips formed on the basis of processing on a substrate, and each sensor chip comprises a functional area; Providing a supporting substrate, and attaching the acoustic sensor wafer and the supporting substrate through an adhesive material to form a bonding wafer, wherein the supporting substrate is provided with a through hole opening and a first slotting structure, the position of the through hole opening corresponds to the position of the functional area in the bonding wafer, and the first slotting structure corresponds to the position of the cutting channel; Placing the bonding wafer on a cut workpiece, and removing a surface protection structure; cutting the base of the complete acoustic sensor wafer along the dicing streets until the adhesive material or support substrate is exposed; And removing the bonding wafer from the cut workpiece, and performing wafer-level acoustic function testing.
  2. 2. The wafer level acoustic function testing method of claim 1, wherein after the step of performing wafer level acoustic function testing, the method further comprises: reversely placing the bonding wafer on the cut workpiece so that the supporting substrate faces upwards; And removing the supporting substrate.
  3. 3. The method of wafer level acoustic function testing according to claim 1, wherein the step of providing an acoustic sensor wafer having a protective structure disposed on a surface thereof comprises: Providing an acoustic sensor wafer; and attaching a BG adhesive tape on the surface of the acoustic sensor wafer.
  4. 4. The wafer level acoustic function testing method of claim 1, wherein the step of thinning the acoustic sensor wafer comprises: And thinning the acoustic sensor wafer to 50-150 mu m by using a grinding process.
  5. 5. The wafer level acoustic function testing method of claim 1, wherein the support substrate is further provided with a second slotted structure, the second slotted structure being located at a side of the through hole opening and communicating with the first slotted structure.
  6. 6. The wafer level acoustic function testing method according to claim 5, wherein four sides of each of the through-hole fenestrations are provided with the first grooved structure.
  7. 7. The wafer level acoustic function testing method of claim 5, wherein a width of the second slotted structure is less than a width of the first slotted structure.
  8. 8. The wafer level acoustic function testing method of claim 1, wherein a thickness of the adhesive material is greater than a thickness of the first grooved structure.
  9. 9. The wafer level acoustic function testing method of claim 1, wherein the diameter of the support substrate is equal to the diameter of the acoustic sensor wafer, and the thickness of the support substrate is 100-2000 μm.
  10. 10. A support substrate provided with a through-hole opening and a first grooving structure, the support substrate being adapted to be bonded to the acoustic sensor wafer by means of an adhesive material when performing the wafer level acoustic function test method according to any one of claims 1 to 8.

Description

Wafer-level acoustic function test method and supporting substrate Technical Field The application relates to the technical field of wafer-level testing, in particular to a wafer-level acoustic function testing method and a supporting substrate. Background Along with the fields of consumer electronics, automotive electronics, medical equipment, the Internet of things and the like, the acoustic sensor is increasingly widely applied. In order to meet the demands of miniaturization, high performance and low cost of devices, wafer level fabrication and packaging techniques are commonly employed in the semiconductor industry. Under the technical path, the wafer-level functional test of the sensor becomes a key link for ensuring the product quality and reducing the subsequent packaging cost. Wafer-level acoustic function testing refers to the evaluation of core performance parameters such as sensitivity, frequency response, linearity and the like of each sensor chip by applying specific acoustic signals (such as sound waves of specific frequency and sound pressure) to the wafer and synchronously detecting the electrical signals converted and output by each sensor chip when the chips are not cut and separated yet (i.e. still in the wafer state). In the prior art, when the acoustic sensor wafer is used for carrying out wafer-level acoustic function test, double precision bottlenecks caused by longitudinal and transverse acoustic wave propagation coupling are faced, and on one hand, if the thickness of the wafer silicon substrate is larger, the longitudinal acoustic wave is obviously attenuated, reflected and converted in a mode in the process of penetrating the substrate, so that acoustic response received by a functional area is distorted, and sensitivity, signal-to-noise ratio and calibration accuracy are seriously affected. On the other hand, when the wafer is thinned to be smaller than 150 μm in order to improve the longitudinal acoustic coupling efficiency, the mechanical strength is rapidly reduced, and warpage, slippage and even cracking are easily generated in the process links such as transmission, carrying, bonding, probe compression bonding and the like, so that the yield is suddenly reduced. In addition, during multi-chip parallel test, the silicon substrates between adjacent chips form a transverse acoustic path to cause crosstalk (cross talk), so that acoustic parameters (such as resonant frequency and phase response) of a single chip are interfered by a radiation sound field of the adjacent chips, and a test result is unreliable and mapping fails. Therefore, there is a need for a wafer level test method that combines ultra-thin substrate acoustic fidelity, wafer level operational robustness, and inter-chip acoustic isolation. Disclosure of Invention The application aims to provide a wafer-level acoustic function testing method and a supporting substrate, which are used for solving the problem that the wafer-level acoustic function test in the prior art cannot be used for considering acoustic fidelity, wafer-level operation robustness and inter-chip acoustic isolation. In order to achieve the above object, the technical scheme adopted by the embodiment of the application is as follows: in one aspect, an embodiment of the present application provides a wafer level acoustic function testing method, including: Providing an acoustic sensor wafer with a protective structure on the surface, and thinning the acoustic sensor wafer, wherein the acoustic sensor wafer is provided with cutting channels and a plurality of acoustic sensor chips formed on the basis of processing on a substrate, and each sensor chip comprises a functional area; Providing a supporting substrate, and attaching the acoustic sensor wafer and the supporting substrate through an adhesive material to form a bonding wafer, wherein the supporting substrate is provided with a through hole opening and a first slotting structure, the position of the through hole opening corresponds to the position of the functional area in the bonding wafer, and the first slotting structure corresponds to the position of the cutting channel; Placing the bonding wafer on a cut workpiece, and removing a surface protection structure; cutting the substrate of the acoustic sensor wafer along the dicing streets until the adhesive material or the support substrate is exposed; And removing the bonding wafer from the cut workpiece, and performing wafer-level acoustic function testing. Optionally, after the step of performing wafer level acoustic function testing, the method further comprises: reversely placing the bonding wafer on the cut workpiece so that the supporting substrate faces upwards; And removing the supporting substrate. Optionally, the step of providing an acoustic sensor wafer having a protective structure disposed on a surface thereof includes: Providing an acoustic sensor wafer; and attaching a BG adhesive tape on the surface of the acoustic sensor wafer