CN-121985539-A - Semiconductor device, preparation method thereof and storage system

Abstract

The disclosure provides a semiconductor device, a preparation method thereof and a storage system, relates to the technical field of semiconductors, and is used for improving the yield of the semiconductor device. The semiconductor device comprises a plurality of first semiconductor structures which are arranged in a stacked manner, and a bonding layer which is arranged between two adjacent first semiconductor structures. The first semiconductor structure comprises a dielectric part, a lead-out wire and a first substrate, wherein the dielectric part penetrates through the inorganic dielectric layer and the first substrate, the lead-out wire is positioned on one side of the first substrate far away from the inorganic dielectric layer and is at least partially opposite to the dielectric part in the thickness direction of the first semiconductor structure. The semiconductor device is used for realizing the reading and writing operation of data.

Inventors

• YANG YI
• LIU WENJING
• LIU LEI

Assignees

• 长江存储控股股份有限公司

Dates

Publication Date

20260505

Application Date

20241024

Claims (20)

1. 1. A semiconductor device includes a plurality of first semiconductor structures stacked and a bonding layer provided between two adjacent first semiconductor structures; The first semiconductor structure comprises a dielectric part, a lead-out wire, an inorganic dielectric layer and a first substrate, wherein the inorganic dielectric layer and the first substrate are stacked, the dielectric part penetrates through the inorganic dielectric layer and the first substrate, and the lead-out wire is positioned on one side, far away from the inorganic dielectric layer, of the first substrate and is at least partially opposite to the dielectric part in the thickness direction of the first semiconductor structure.
2. 2. The semiconductor device according to claim 1, wherein a distance between a surface of the dielectric portion close to the bonding layer and a surface of the inorganic dielectric layer close to the bonding layer in a thickness direction of the first semiconductor structure is a preset value.
3. 3. The semiconductor device according to claim 2, wherein the preset value is less than or equal to 5nm.
4. 4. The semiconductor device according to claim 1, wherein a polishing selectivity of the dielectric portion and the inorganic dielectric layer is greater than a polishing selectivity of the dielectric portion and the first substrate.
5. 5. The semiconductor device of claim 1, wherein a thickness of the inorganic dielectric layer is less than a thickness of the first substrate.
6. 6. The semiconductor device according to claim 5, wherein the thickness of the inorganic dielectric layer ranges from 50nm to 200nm.
7. 7. The semiconductor device of claim 1, wherein the material of the inorganic dielectric layer comprises silicon nitride.
8. 8. The semiconductor device of claim 1, wherein the dielectric portions of each of the first semiconductor structures are equal in dimension along a first direction, the first direction being perpendicular to a thickness direction of the first semiconductor structure.
9. 9. The semiconductor device according to claim 8, wherein each of the dielectric portions is opposed in a thickness direction of the first semiconductor structure.
10. 10. The semiconductor device of claim 8, wherein the dielectric portion comprises a first sub-portion and a second sub-portion connected together, the first sub-portion extending through the first substrate and the second sub-portion extending through the inorganic dielectric layer; The first sub-portion and the second sub-portion are opposite to each other in the thickness direction of the first semiconductor structure, and the side wall of the first sub-portion is connected with the side wall of the second sub-portion.
11. 11. The semiconductor device of claim 1, further comprising a plurality of contact structures; One of the contact structures penetrates through the dielectric portion of at least one first semiconductor structure and the bonding layer, extends into a first semiconductor structure adjacent to the at least one first semiconductor structure, and is connected with the lead-out wire of the adjacent first semiconductor structure.
12. 12. The semiconductor device according to claim 11, wherein the lead-out wire connected to one of the contact structures is spaced from the other of the contact structures in the adjacent two contact structures.
13. 13. The semiconductor device according to claim 12, wherein a portion of the lead-out wire which faces the dielectric portion extends in the first direction; The sizes of the lead wires in the first semiconductor structures along the first direction are unequal, and the first direction is perpendicular to the thickness direction of the first semiconductor structures.
14. 14. The semiconductor device of claim 11, wherein the first semiconductor structure further comprises a memory array layer and a peripheral device layer, wherein the memory array layer is located between the peripheral device layer and the lead-out wire and on a side of the lead-out wire adjacent to the first substrate; the contact structure also extends through at least one of the memory array layer and the peripheral device layer of the first semiconductor structure.
15. 15. The semiconductor device of claim 14, wherein the first semiconductor structure has a bonding region and a functional region; The medium part and the contact structure are positioned in the bonding area, the lead-out wire extends from the functional area to the bonding area, the peripheral device layer comprises a plurality of peripheral devices positioned in the functional area and a peripheral medium layer positioned in the bonding area, the storage array layer comprises a plurality of storage arrays positioned in the functional area and a storage medium layer positioned in the bonding area, and the storage arrays are connected with the lead-out wire and the peripheral devices.
16. 16. The semiconductor device according to claim 1, wherein the bonding layer includes a first sub-bonding layer and a second sub-bonding layer bonded to each other; In the two adjacent first semiconductor structures, one side, close to the other first semiconductor structure, of the lead-out wire of one first semiconductor structure is covered with the second sub-bonding layer, and the inorganic medium layer of the other first semiconductor structure is covered with the first sub-bonding layer.
17. 17. The semiconductor device according to claim 1, wherein a material of the dielectric portion is the same as a material of the bonding layer.
18. 18. The semiconductor device of claim 17, wherein the material of the dielectric portion comprises silicon oxide.
19. 19. The semiconductor device according to any one of claims 1 to 18, further comprising a second semiconductor structure; the second semiconductor structure is connected to one side of the plurality of first semiconductor structures in a thickness direction of the first semiconductor structure.
20. 20. A method of manufacturing a semiconductor device, the method comprising: Forming a plurality of first semiconductor structures, wherein each first semiconductor structure comprises a first substrate and a lead-out wire positioned at one side of the first substrate; forming an inorganic dielectric layer on a first substrate of the first semiconductor structure; forming a dielectric portion penetrating the inorganic dielectric layer and the first substrate; and bonding one side surface of the other first semiconductor structure, which is far away from the first substrate, on the inorganic dielectric layer and the dielectric part.

Description

Semiconductor device, preparation method thereof and storage system Technical Field The disclosure relates to the technical field of semiconductors, and in particular relates to a semiconductor device, a manufacturing method thereof and a storage system. Background With the continued evolution of integrated circuit technology, the number of semiconductor structures in semiconductor devices has increased, and in order to address the limitations of two-dimensional or planar semiconductor devices, a plurality of semiconductor structures in semiconductor devices are stacked together in a vertically stacked manner. However, in the process of stacking a plurality of semiconductor structures, defects are likely to exist between two semiconductor structures adjacent in the vertical direction, and the yield of the semiconductor device is reduced. Disclosure of Invention In one aspect, a semiconductor device is provided that includes a plurality of first semiconductor structures arranged in a stack, and a bonding layer arranged between two adjacent first semiconductor structures. The first semiconductor structure comprises a dielectric part, a lead-out wire, an inorganic dielectric layer and a first substrate which are stacked. The lead-out wire is positioned at one side of the first substrate far away from the inorganic medium layer and is at least partially opposite to the medium part in the thickness direction of the first semiconductor structure. In some embodiments, a distance between a surface of the dielectric portion adjacent to the bonding layer and a surface of the inorganic dielectric layer adjacent to the bonding layer in a thickness direction of the first semiconductor structure is a preset value. In some embodiments, the preset value is less than or equal to 5nm. In some embodiments, the polishing selectivity of the dielectric portion and the inorganic dielectric layer is greater than the polishing selectivity of the dielectric portion and the first substrate. In some embodiments, the thickness of the inorganic dielectric layer is less than the thickness of the first substrate. In some embodiments, the thickness range of the inorganic dielectric layer includes 50nm to 200nm. In some embodiments, the material of the inorganic dielectric layer comprises silicon nitride. In some embodiments, the dielectric portions of each of the first semiconductor structures are equal in size along a first direction that is perpendicular to a thickness direction of the first semiconductor structure. In some embodiments, each of the dielectric portions is directly opposite in a thickness direction of the first semiconductor structure. In some embodiments, the dielectric portion includes a first sub-portion and a second sub-portion connected, the first sub-portion extending through the first substrate, the second sub-portion extending through the inorganic dielectric layer. The first sub-portion and the second sub-portion are opposite to each other in the thickness direction of the first semiconductor structure, and the side wall of the first sub-portion is connected with the side wall of the second sub-portion. In some embodiments, the semiconductor device further includes a plurality of contact structures. One of the contact structures penetrates through the dielectric portion of at least one first semiconductor structure and the bonding layer, extends into a first semiconductor structure adjacent to the at least one first semiconductor structure, and is connected with the lead-out wire of the adjacent first semiconductor structure. In some embodiments, the lead-out wire connected with one contact structure is arranged at a distance from the other contact structure in two adjacent contact structures. In some embodiments, a portion of the lead-out wire that faces the dielectric portion extends in a first direction. The sizes of the lead wires in the first semiconductor structures along the first direction are unequal, and the first direction is perpendicular to the thickness direction of the first semiconductor structures. In some embodiments, the first semiconductor structure further comprises a memory array layer and a peripheral device layer, wherein the memory array layer is positioned between the peripheral device layer and the lead-out wire and positioned on one side of the lead-out wire close to the first substrate, and the lead-out wire is connected with the memory array layer. The contact structure also extends through at least one of the memory array layer and the peripheral device layer of the first semiconductor structure. In some embodiments, the first semiconductor structure has a bonding region and a functional region. The medium part and the contact structure are positioned in the bonding area, the lead-out wire extends from the functional area to the bonding area, the peripheral device layer comprises a plurality of peripheral devices positioned in the functional area and a peripheral medium layer positio