Search

CN-121985565-A - Semiconductor device and electronic apparatus

CN121985565ACN 121985565 ACN121985565 ACN 121985565ACN-121985565-A

Abstract

The embodiment of the disclosure provides a semiconductor device and electronic equipment, relates to the technical field of power semiconductor devices, and is used for inhibiting the influence of radiation effect on the semiconductor device. The semiconductor device comprises a substrate, a first epitaxial layer, a second epitaxial layer, two first well regions, a doping structure, a shielding layer, a current expansion layer, two grid electrodes, two dielectric layers, a source electrode layer and a drain electrode layer. The first epitaxial layer and the second epitaxial layer are sequentially stacked on one side of the substrate along the first direction, the first direction is the thickness direction of the substrate, the two first well regions and the doping structure are arranged in the second epitaxial layer, the doping structure comprises a doping part and a second well region which are arranged along the first direction, the shielding layer and the current expansion layer are arranged in the first epitaxial layer, the two grid electrodes are arranged on one side of the second epitaxial layer, which is far away from the substrate, each medium layer wraps one grid electrode, the source electrode layer is arranged on one side of the second epitaxial layer, which is far away from the substrate, and the drain electrode layer is arranged on the opposite side of the substrate relative to the first epitaxial layer.

Inventors

  • WANG HANG
  • CHEN GANG
  • XIA YUN

Assignees

  • 深圳平湖实验室

Dates

Publication Date
20260505
Application Date
20260128

Claims (12)

  1. 1. A semiconductor device, comprising: A substrate; The first epitaxial layer and the second epitaxial layer are arranged on one side of the substrate along a first direction in a lamination mode, the first direction is the thickness direction of the substrate, and the second epitaxial layer is far away from the substrate compared with the first epitaxial layer; The semiconductor device comprises a first epitaxial layer, a doping structure and two first well regions, wherein the first epitaxial layer is arranged on the substrate, the doping structure and the two first well regions are arranged in the second epitaxial layer, the two first well regions are respectively positioned on two opposite sides of the doping structure along a second direction, and the second direction is perpendicular to the first direction; The shielding layer and the current expansion layer are arranged in the first epitaxial layer; the shielding layer and the second well region overlap along the first direction; the current expansion layer is overlapped with the first well region along the first direction; the two grid electrodes are arranged on one side, far away from the substrate, of the second epitaxial layer and are arranged at intervals along the second direction; Two dielectric layers, each of which wraps one of the grid electrodes and is in contact with the first well region, the doped part and a part of the second epitaxial layer, which is positioned between the first well region and the doped structure; the source electrode layer is arranged on one side, far away from the substrate, of the second epitaxial layer and the dielectric layer and is connected with the doping part; And the drain electrode layer is arranged on the opposite side of the substrate relative to the first epitaxial layer.
  2. 2. The semiconductor device according to claim 1, wherein the first epitaxial layer includes a first portion and a second portion disposed along the first direction, the first portion being closer to the substrate than the second portion; The shielding layer and the current expansion layer are arranged in the second part, and one side surface of the current expansion layer, which is close to the substrate, is in contact with the first part.
  3. 3. The semiconductor device according to claim 2, wherein a side surface of the shielding layer away from the substrate is in contact with the second well region, a side surface of the shielding layer being covered with the current spreading layer; a side surface of the shielding layer near the substrate is covered by the current spreading layer, or a side surface of the shielding layer near the substrate is in contact with the first portion.
  4. 4. The semiconductor device according to claim 1, wherein doping types of the first epitaxial layer, the second epitaxial layer, and the current spreading layer are the same, and doping types of the first well region, the second well region, the doping portion, and the shielding layer are the same; The semiconductor device meets at least one of the following conditions: the doping concentration of the first well region is the same as that of the second well region; The doping concentration of the doping part is larger than that of the first well region and the second well region; The doping concentration of the doping part is larger than that of the shielding layer; The doping concentration of the shielding layer is larger than that of the first well region and the second well region; The doping concentration of the current expansion layer is larger than that of the second epitaxial layer; The doping concentration of the second epitaxial layer is greater than the doping concentration of the first epitaxial layer.
  5. 5. The semiconductor device according to claim 1, wherein a dimension of an end of the shielding layer near the substrate in the second direction is smaller than a dimension of an end of the shielding layer far from the substrate in the second direction.
  6. 6. The semiconductor device of claim 5, wherein, along the first direction and from the first epitaxial layer to the second epitaxial layer, The size of the shielding layer along the second direction increases stepwise, or The size of the shielding layer along the second direction gradually increases, or The shielding layer comprises a first sub-shielding layer and a second sub-shielding layer, the size of the first sub-shielding layer along the second direction is gradually increased, and the size of the second sub-shielding layer along the second direction is unchanged.
  7. 7. The semiconductor device according to claim 1, wherein a dimension of an end of the shielding layer near the substrate in the second direction is larger than a dimension of an end of the shielding layer far from the substrate in the second direction.
  8. 8. The semiconductor device of claim 7, wherein, along the first direction and from the first epitaxial layer to the second epitaxial layer, The size of the shielding layer along the second direction is reduced stepwise, or The size of the shielding layer along the second direction gradually decreases, or The shielding layer comprises a first sub-shielding layer and a second sub-shielding layer, the size of the first sub-shielding layer along the second direction is unchanged, and the size of the second sub-shielding layer along the second direction is gradually reduced.
  9. 9. The semiconductor device of claim 1, wherein a dimension of the shielding layer along the second direction is unchanged along the first direction and from the first epitaxial layer to the second epitaxial layer.
  10. 10. The semiconductor device according to any one of claims 1 to 9, wherein the source layer is in contact with the doped portion, or The semiconductor device further comprises a barrier layer arranged between the source layer and the doped part, wherein the source layer is connected with the doped part through the barrier layer, and the barrier layer is in contact with the doped part.
  11. 11. The semiconductor device of claim 1, wherein the shielding layer comprises a plurality of shielding portions arranged at intervals along a third direction, the third direction being perpendicular to the first direction and intersecting the second direction; A portion of the current spreading layer is located between two of the shielding portions adjacent in the third direction.
  12. 12. An electronic device comprising the semiconductor device according to any one of claims 1 to 11 and a circuit board, wherein the semiconductor device is provided on the circuit board.

Description

Semiconductor device and electronic apparatus Technical Field The present disclosure relates to the field of semiconductor technologies, and in particular, to a semiconductor device and an electronic device. Background With the deepening of space exploration tasks and the complicating of spacecraft functions, performance limits of aerospace equipment such as deep space probes are continuously pushed to be new and high, stable operation of the equipment depends on a high-power-density electric energy conversion system in the equipment, and the system is responsible for efficient acquisition, transformation, distribution and management of spacecraft energy and is a core power source for guaranteeing equipment work. In order to meet the requirements of deep space exploration on long service life and high reliability, the requirements of aerospace equipment on durability and driving efficiency of a high-power-density electric energy conversion system of the aerospace equipment are increasingly increasing, and the power semiconductor devices in the electric energy conversion system are required to be smaller in size under higher rated voltage. Among them, a Metal-Oxide-Semiconductor field effect Transistor (MOSFET) is a common power Semiconductor device, and its performance directly affects the efficiency and reliability of the whole system. Currently, silicon carbide (SiC) is an ideal material for realizing a high-performance MOSFET by virtue of its wide forbidden band, high critical breakdown electric field, high electron saturation rate, excellent thermal conductivity and good irradiation resistance. Compared with the traditional silicon-based device, the SiC MOSFET can stably work under the conditions of higher temperature, high voltage and high frequency, however, in the high-radiation environment such as space, the SiC MOSFET is exposed to high-energy particle irradiation for a long time, and is easily influenced by radiation effects, so that key electrical parameters of the device are degraded, and the reliability of the device is influenced. Therefore, how to effectively inhibit the influence of the radiation effect on the SiC MOSFET and improve the long-term working reliability of the SiC MOSFET in the spatial environment has become a core technical challenge to be broken through currently. Disclosure of Invention An object of an embodiment of the present disclosure is to provide a semiconductor device and an electronic apparatus for suppressing an influence of a radiation effect on a SiC MOSFET. In order to achieve the above object, the embodiments of the present disclosure provide the following technical solutions: In one aspect, a semiconductor device is provided. The semiconductor device comprises a substrate, a first epitaxial layer, a second epitaxial layer, two first well regions, a doped structure, a shielding layer, a current expansion layer, two grid electrodes, two dielectric layers, a source electrode layer and a drain electrode layer. The first epitaxial layer and the second epitaxial layer are stacked on one side of the substrate along a first direction, the first direction is a thickness direction of the substrate, and the second epitaxial layer is far away from the substrate compared with the first epitaxial layer. The two first well regions and the doped structure are arranged in the second epitaxial layer, and the two first well regions are respectively positioned at two opposite sides of the doped structure along a second direction, wherein the second direction is perpendicular to the first direction. A portion of the second epitaxial layer is located between the first well region and the doped structure. The doping structure includes a doping portion and a second well region arranged along the first direction, the doping portion being farther from the substrate than the second well region. The shielding layer and the current expansion layer are arranged in the first epitaxial layer. The shielding layer and the second well region overlap in the first direction. The current spreading layer overlaps the first well region in the first direction. The two gates are arranged on one side, far away from the substrate, of the second epitaxial layer, are arranged at intervals along the second direction, and each dielectric layer wraps one gate and is in contact with the first well region, the doped part and a part, located between the first well region and the doped structure, of the second epitaxial layer. The source electrode layer is arranged on one side, far away from the substrate, of the second epitaxial layer and the dielectric layer and is connected with the doping part. The drain layer is disposed on an opposite side of the substrate from the first epitaxial layer. In the above arrangement, the doped portion is connected with the source layer, so that holes can be more easily absorbed by the doped portion and enter the source layer, the concentration of holes entering the first well re