CN-121985572-A - Semiconductor laminate, method for producing semiconductor laminate, and hydride vapor phase growth apparatus

CN121985572ACN 121985572 ACN121985572 ACN 121985572ACN-121985572-A

Abstract

A high-quality semiconductor laminate having a PN junction structure comprising an n-type layer and a p-type layer or a PI junction structure comprising an i-type layer and a p-type layer, a method for manufacturing the semiconductor laminate, and a hydride vapor phase growth apparatus are obtained. The PN junction structure comprises a substrate, a PN junction structure or a PI junction structure, wherein the PN junction structure comprises an n-type semiconductor layer formed by III-group nitride crystals containing n-type impurities on the substrate and a p-type semiconductor layer formed by III-group nitride crystals containing Mg as p-type impurities on the n-type semiconductor layer, the PN junction is formed by the n-type semiconductor layer and the p-type semiconductor layer, the PI junction structure comprises an i-type semiconductor layer formed by III-group nitride on the substrate and a p-type semiconductor layer on the i-type semiconductor layer, the PI junction is formed by the i-type semiconductor layer and the p-type semiconductor layer, the Mg concentration in the n-type semiconductor layer or the i-type semiconductor layer is less than 1×10 16 cm ‑3 , and the Fe concentration in an interface of the PN junction or the PI junction is less than 2×10 15 cm ‑3 .

Inventors

Kaneki Kota
FUJIKURA HAJIME

Assignees

住友化学株式会社

Dates

Publication Date: 20260505
Application Date: 20250925
Priority Date: 20241031

Claims (9)

1. A semiconductor laminate, wherein, The semiconductor laminate is provided with: A substrate base plate, and A PN-junction configuration or a PI-junction configuration, In the PN junction structure, an n-type semiconductor layer composed of III-nitride crystal containing n-type impurity on the substrate base plate and a p-type semiconductor layer composed of III-nitride crystal containing Mg as p-type impurity on the n-type semiconductor layer are provided, PN junction is composed of the n-type semiconductor layer and the p-type semiconductor layer, In the PI bonding structure, the substrate comprises an i-type semiconductor layer composed of III nitride on the substrate base plate and the p-type semiconductor layer on the i-type semiconductor layer, PI bonding is composed of the i-type semiconductor layer and the p-type semiconductor layer, The Mg concentration in the n-type semiconductor layer or the i-type semiconductor layer is less than 1 x 10 16 cm -3 , The concentration of Fe in the interface between the PN junction and the PI junction is 2X 10 15 cm -3 or less.
2. The semiconductor laminate according to claim 1, wherein, The concentration of Fe in the n-type semiconductor layer and the i-type semiconductor layer is 2×10 15 cm -3 or less.
3. The semiconductor laminate according to claim 1, wherein, The concentration of C in the n-type semiconductor layer, the i-type semiconductor layer, and the p-type semiconductor layer is less than 5×10 15 cm -3 .
4. The semiconductor laminate according to claim 1, wherein, The O concentration in the n-type semiconductor layer is less than 5 x 10 15 cm -3 , The concentration of B in the n-type semiconductor layer is less than 1 x 10 15 cm -3 , The concentration of the n-type impurity in the n-type semiconductor layer is 5×10 14 cm -3 or more.
5. The semiconductor laminate according to claim 1, wherein, The Si concentration in the i-type semiconductor layer is less than 1 x 10 15 cm -3 , The O concentration in the i-type semiconductor layer is less than 5 x 10 15 cm -3 , The concentration of B in the i-type semiconductor layer is less than 1×10 15 cm -3 .
6. The semiconductor laminate according to claim 1, wherein, The Si concentration in the p-type semiconductor layer is less than 1 x 10 15 cm -3 , The concentration of B in the p-type semiconductor layer is less than 1 x 10 15 cm -3 , The O concentration in the p-type semiconductor layer is less than 5 x 10 15 cm -3 , The concentration of F in the p-type semiconductor layer is less than 4×10 13 cm -3 .
7. The semiconductor laminate according to claim 1, wherein, The Si concentration in the p-type semiconductor layer is less than 1 x 10 15 cm -3 , The concentration of B in the p-type semiconductor layer is less than 1 x 10 15 cm -3 , The O concentration in the p-type semiconductor layer is less than 5 x 10 15 cm -3 , The concentration of F in the p-type semiconductor layer is 1X 10 14 cm -3 or more.
8. A method for manufacturing a semiconductor laminate, wherein, The method for manufacturing the semiconductor laminate comprises the following steps (a), (b) and (c): (a) In this step, a substrate is placed in a first space for crystal growth among spaces in a reaction vessel provided in a hydride vapor phase growth apparatus, and a Mg raw material is placed in a gas generator placed in a second space different from the first space among the spaces; (b) The process comprises either (b 1) a process of supplying a group III element halide and a nitriding agent to the substrate in the first space and supplying an n-type impurity-containing gas, growing an n-type semiconductor layer composed of a group III nitride crystal containing an n-type impurity on the substrate, and (b 2) a process of supplying a group III element halide and a nitriding agent to the substrate in the first space, growing an i-type semiconductor layer composed of a group III nitride crystal on the substrate, and (C) In this step, a halide of a group III element and a nitriding agent are supplied to the substrate in the first space, a halogen-containing gas is supplied to the Mg raw material in the gas generator, a Mg-containing gas generated by a reaction between the halogen-containing gas and the Mg raw material or a Mg-containing gas generated by vaporizing the Mg raw material in the gas generator is supplied from a nozzle provided at a downstream end of a gas supply pipe connected to a downstream side of the gas generator, a p-type semiconductor layer composed of a group III nitride crystal containing Mg is grown on the substrate, Starting the generation of the Mg-containing gas before the start of the step (c), and discharging the Mg-containing gas generated before the start of the step (c) from a discharge pipe connected to the gas supply pipe to the outside of the reaction vessel without passing through the first space, And (c) supplying the Mg-containing gas generated during the execution of the step (c) from the nozzle to the substrate in the first space by switching the flow path of the Mg-containing gas by controlling a flow path switching valve provided at a connection portion of the gas supply pipe to the discharge pipe.
9. A hydride vapor phase growth device, wherein, The hydride vapor phase growth device comprises: a reaction vessel in which a first space and a second space are formed, wherein a substrate is placed in the first space to perform crystal growth, and the second space is heated to a temperature different from that of the first space; A gas generator disposed in the second space and configured with a dopant raw material; A gas supply pipe connected to a downstream end of the gas generator; a nozzle connected to a downstream end of the gas supply pipe, the nozzle supplying a dopant-containing gas generated in the gas generator toward the substrate in the first space; A discharge pipe connected to the gas supply pipe; A flow path switching valve disposed in the second space for switching a flow path of the dopant-containing gas generated in the gas generator so as to be discharged to the outside of the reaction vessel through the discharge pipe without passing through the first space, and A control unit for controlling the flow path switching valve, The reaction vessel is configured with a first flow path for supplying the dopant-containing gas to the substrate in the first space through the gas supply pipe and the nozzle, and a second flow path for discharging the dopant-containing gas to the outside of the reaction vessel through the gas supply pipe and the discharge pipe without passing through the first space, The control unit controls the flow path switching valve to switch between the first flow path and the second flow path.

Description

Semiconductor laminate, method for producing semiconductor laminate, and hydride vapor phase growth apparatus Technical Field The present disclosure relates to a semiconductor laminate, a method for manufacturing the semiconductor laminate, and a hydride vapor phase growth apparatus. Background When a PN junction structure having an n-type semiconductor layer (n-type layer) composed of a group III nitride crystal containing an n-type impurity and a p-type semiconductor layer (p-type layer) composed of a group III nitride crystal containing magnesium (Mg) as a p-type impurity is provided, the n-type layer and the p-type layer may be continuously grown by the HVPE method in the same hydride vapor phase growth (HVPE) apparatus (for example, refer to patent document 1). The same applies to the case of providing a PI bonding structure including a semiconductor layer (i-type layer) made of a group III nitride crystal and having non-conductivity, and a p-type layer. In this disclosure, the term "semiconductor layer having non-conductivity" refers to a semiconductor layer having lower conductivity than a p-type layer. Prior art literature Patent literature Patent document 1 Japanese patent laid-open No. 2023-110417 Disclosure of Invention [ Problem ] to be solved by the invention An object of the present disclosure is to obtain a high-quality semiconductor laminate having a PN junction structure having an n-type layer and a p-type layer or a PI junction structure having an i-type layer and a p-type layer. [ Solution ] to solve the problem According to an aspect of the present disclosure, there is provided a semiconductor laminate, wherein, The semiconductor laminate is provided with: A substrate base plate, and A PN-junction configuration or a PI-junction configuration, In the PN junction structure, an n-type semiconductor layer composed of III-nitride crystal containing n-type impurity on the substrate base plate and a p-type semiconductor layer composed of III-nitride crystal containing Mg as p-type impurity on the n-type semiconductor layer are provided, PN junction is composed of the n-type semiconductor layer and the p-type semiconductor layer, In the PI bonding structure, the substrate comprises an i-type semiconductor layer composed of III nitride on the substrate base plate and the p-type semiconductor layer on the i-type semiconductor layer, PI bonding is composed of the i-type semiconductor layer and the p-type semiconductor layer, The Mg concentration in the n-type semiconductor layer or the i-type semiconductor layer is less than 1 x 10 16cm-3, The concentration of Fe in the interface between the PN junction and the PI junction is 2X 10 15cm-3 or less. According to another aspect of the present disclosure, there is provided a method of manufacturing a semiconductor laminate, wherein, The method for manufacturing the semiconductor laminate comprises the following steps (a), (b) and (c): (a) In this step, a substrate is placed in a first space for crystal growth among spaces in a reaction vessel provided in a hydride vapor phase growth apparatus, and a Mg raw material is placed in a gas generator placed in a second space different from the first space among the spaces; (b) The process comprises either (b 1) a process of supplying a group III element halide and a nitriding agent to the substrate in the first space and supplying an n-type impurity-containing gas, growing an n-type semiconductor layer composed of a group III nitride crystal containing an n-type impurity on the substrate, and (b 2) a process of supplying a group III element halide and a nitriding agent to the substrate in the first space, growing an i-type semiconductor layer composed of a group III nitride crystal on the substrate, and (C) In this step, a halide of a group III element and a nitriding agent are supplied to the substrate in the first space, a halogen-containing gas is supplied to the Mg raw material in the gas generator, a Mg-containing gas generated by a reaction between the halogen-containing gas and the Mg raw material or a Mg-containing gas generated by vaporizing the Mg raw material in the gas generator is supplied from a nozzle provided at a downstream end of a gas supply pipe connected to a downstream side of the gas generator, a p-type semiconductor layer composed of a group III nitride crystal containing Mg is grown on the substrate, Starting the generation of the Mg-containing gas before the start of the step (c), and discharging the Mg-containing gas generated before the start of the step (c) from a discharge pipe connected to the gas supply pipe to the outside of the reaction vessel without passing through the first space, And (c) supplying the Mg-containing gas generated during the execution of the step (c) from the nozzle to the substrate in the first space by switching the flow path of the Mg-containing gas by controlling a flow path switching valve provided at a connection portion of the gas supply pipe to the