CN-121985573-A - Semiconductor structure and manufacturing method thereof

Abstract

The application provides a semiconductor structure and a manufacturing method thereof, which are applied to the technical field of semiconductors. In the application, the composite buffer layer is formed between the oxide layer and the high-k dielectric layer, and is a periodic structure formed by alternately growing the first buffer layer and the second buffer layer, so that chemical bonding optimization is formed between the oxide layer and the high-k dielectric layer, and interface defects are reduced.

Inventors

• JIANG LINFENG
• Li Qiumao
• LIN ZHAOHONG

Assignees

• 重庆芯联微电子有限公司

Dates

Publication Date

20260505

Application Date

20251229

Claims (10)

1. 1. A method of fabricating a semiconductor structure, comprising: Providing a substrate; Forming an oxide layer on the substrate; forming a composite buffer layer on the oxide layer, wherein the composite buffer layer is a periodic structure formed by alternately growing a first buffer layer and a second buffer layer; And forming a high-k dielectric layer on the composite buffer layer.
2. 2. The method of fabricating a semiconductor structure of claim 1, wherein the material of the first buffer layer comprises aluminum oxide.
3. 3. The method of fabricating a semiconductor structure of claim 1, wherein the material of the second buffer layer comprises lanthanum oxide.
4. 4. The method of manufacturing a semiconductor structure according to claim 1, wherein the number of cycles of the composite buffer layer is 1-6.
5. 5. The method of claim 1, wherein the first buffer layer has a single cycle thickness in the range of 0.5 a to 1.5 a.
6. 6. The method of claim 1, wherein the second buffer layer has a single cycle thickness in the range of 0.5 a to 1.5 a.
7. 7. The method of fabricating a semiconductor structure of claim 1, further comprising, prior to forming the oxide layer: Forming a plurality of trench isolations on the substrate to define a plurality of active regions; performing ion implantation on at least one active region to form an N well region; and performing ion implantation on at least one active region to form a P well region.
8. 8. A semiconductor structure, comprising: A substrate; An oxide layer on the substrate; A composite buffer layer on the oxide layer, the composite buffer layer comprising: A first buffer layer, and The second buffer layer is positioned on the first buffer layer, and the first buffer layer and the second buffer layer are periodic structures formed by alternate growth; and the high-k dielectric layer is positioned on the composite buffer layer.
9. 9. The semiconductor structure of claim 8, wherein the number of cycles of the composite buffer layer is 1-6.
10. 10. The semiconductor structure of claim 8, wherein a material of the first buffer layer comprises aluminum oxide and a material of the second buffer layer comprises lanthanum oxide.

Description

Semiconductor structure and manufacturing method thereof Technical Field The application relates to the technical field of semiconductors, in particular to a semiconductor structure and a manufacturing method thereof. Background With the continued miniaturization of integrated circuits, gate oxide layers (e.g., siO 2) are continually thinned in order to improve the gate's ability to control the channel. However, when the thickness of the gate oxide layer is reduced to <3nm, siO 2 is no longer an ideal insulator, and significant tunneling effects occur to form leakage currents, so high-k materials (e.g., hfO 2) are introduced as a gate dielectric layer material instead of SiO 2. But when HfO 2 is deposited directly on an oxide (e.g., siO 2, siON), interfacial dangling bonds and oxygen vacancy defects can result due to lattice mismatch and chemical bonding incompatibility, and secondly, amorphous HfO 2 itself presents certain oxygen vacancy defects that can lead to leakage current channel formation and threshold voltage drift. Traditional solutions include PDA (Post-deposition annealing, post-deposition anneal), DPN (Decoupled Plasma Nitridation ), etc., but nitriding the high-k dielectric layer sacrifices Equivalent Oxide Thickness (EOT), which is difficult to meet the high performance requirements of the device, and secondly, the subsequent high-temperature anneal process also easily causes interdiffusion of the high-k dielectric layer and the oxide layer, which aggravates interface defects. Disclosure of Invention The application aims to provide a semiconductor structure and a manufacturing method thereof, wherein a composite buffer layer is formed between an oxide layer and a high-k dielectric layer, and is a periodic structure formed by alternately growing a first buffer layer and a second buffer layer, so that chemical bonding optimization is formed between the oxide layer and the high-k dielectric layer, and interface defects are reduced. In order to solve the above technical problems, the present application provides a method for manufacturing a semiconductor structure, which at least includes the following steps: Providing a substrate; Forming an oxide layer on the substrate; forming a composite buffer layer on the oxide layer, wherein the composite buffer layer is a periodic structure formed by alternately growing a first buffer layer and a second buffer layer; and forming a high-k dielectric layer on the composite buffer layer. Further, the material of the first buffer layer includes alumina. Further, the material of the second buffer layer includes lanthanum oxide. Further, the cycle number of the composite buffer layer is 1-6. Further, the single-period thickness of the first buffer layer ranges from 0.5 angstroms to 1.5 angstroms. Further, the thickness of the second buffer layer in a single cycle is in the range of 0.5-1.5 angstroms. In order to solve the above technical problems, the present application further provides a semiconductor structure, including: A substrate; An oxide layer on the substrate; A composite buffer layer on the oxide layer, the composite buffer layer comprising: A first buffer layer, and The second buffer layer is positioned on the first buffer layer, and the first buffer layer and the second buffer layer are periodic structures formed by alternate growth; and the high-k dielectric layer is positioned on the composite buffer layer. Further, the cycle number of the composite buffer layer is 1-6. Further, the material of the first buffer layer includes alumina, and the material of the second buffer layer includes lanthanum oxide. Compared with the prior art, the technical scheme of the application has at least one of the following beneficial effects: According to the semiconductor structure and the manufacturing method thereof, the composite buffer layer (the composite buffer layer is a periodic structure formed by alternately growing the first buffer layer and the second buffer layer) is formed between the oxide layer and the high-k dielectric layer, so that chemical bonding optimization is formed between the oxide layer and the high-k dielectric layer, and interface defects are reduced. Specifically, firstly, because an unstable transition layer (such as silicate) may be formed between the high-k dielectric layer and the oxide layer, charge traps may be introduced, and a layer of the first buffer layer (such as alumina) is inserted between the high-k dielectric layer and the oxide layer, and may be combined with a silicon-oxygen bond of the oxide layer (such as silica) to generate a stable silicon-oxygen-aluminum bond, so as to achieve the purpose of passivating oxygen vacancy defects, secondly, lanthanum atoms contained in the second buffer layer (such as lanthanum oxide) formed on the first buffer layer may be combined with hafnium atoms and oxygen atoms in the high-k dielectric layer, so as to inhibit the formation of oxygen vacancies, reduce the oxygen vacancy defect