CN-121985575-A - Semiconductor device and method for forming the same

Abstract

The method for forming a semiconductor device includes patterning a gate stack using a patterned photoresist layer, wherein the gate stack includes a conductive layer, a metal layer on the conductive layer, and a hard mask layer over the metal layer, and removing the patterned photoresist layer using a nitrogen-containing gas, wherein a liner is formed on the metal layer of the gate stack during the removal of the patterned photoresist layer. The pad can be used as a protective layer to effectively prevent oxidation of the metal layer, thereby inhibiting the increase of resistance.

Inventors

• Luo Haozhan

Assignees

• 南亚科技股份有限公司

Dates

Publication Date

20260505

Application Date

20260209

Priority Date

20251017

Claims (20)

1. 1. A method of forming a semiconductor device, comprising: patterning a gate stack with a patterned photoresist layer, wherein the gate stack comprises a conductive layer, a metal layer on the conductive layer, and a hard mask layer over the metal layer, and The patterned photoresist layer is removed using a nitrogen-containing gas, wherein a liner is formed on the metal layer of the gate stack during the removal of the patterned photoresist layer.
2. 2. The method of claim 1, wherein the conductive layer is comprised of polysilicon, the metal layer is comprised of tungsten, and the hard mask layer is comprised of an oxide or nitride.
3. 3. The method of claim 1, wherein the liner is comprised of a nitride of the metal layer.
4. 4. The method of claim 1, wherein the liner is comprised of tungsten nitride.
5. 5. The method of claim 1, wherein the nitrogen-containing gas is a diimine.
6. 6. The method of claim 1, wherein removing the patterned photoresist layer is performed by using pure diimine.
7. 7. The method of claim 1, wherein removing the patterned photoresist layer is performed without using an oxygen-containing gas.
8. 8. The method of claim 1, further comprising: After removing the patterned photoresist layer, spacers are formed along sidewalls of the gate stack.
9. 9. The method of claim 8, wherein the liner is located between the spacer and the metal layer of the gate stack.
10. 10. The method of claim 9, wherein the metal layer of the gate stack is separated from the spacer by the liner.
11. 11. A semiconductor device, comprising: A substrate; A gate stack over the substrate and comprising: A conductive layer; a metal layer over the conductive layer, and A hard mask layer over the metal layer; A spacer on the metal layer of the gate stack, and Spacers along sidewalls of the gate stack.
12. 12. The semiconductor device according to claim 11, wherein the conductive layer is comprised of polysilicon, the metal layer is comprised of tungsten, and the hard mask layer is comprised of an oxide or nitride.
13. 13. The semiconductor device of claim 11, wherein the liner is comprised of a nitride of the metal layer.
14. 14. The semiconductor device as defined in claim 11, wherein the liner is comprised of tungsten nitride.
15. 15. The semiconductor device of claim 11, wherein the liner is located between the spacer and the metal layer of the gate stack.
16. 16. The semiconductor device of claim 15, wherein the metal layer of the gate stack is separated from the spacer by the liner.
17. 17. The semiconductor device of claim 11, wherein the conductive layer contacts the spacer.
18. 18. The semiconductor device of claim 11, wherein the hard mask layer contacts the spacer.
19. 19. The semiconductor element of claim 11, wherein a lateral width of the liner is less than a lateral width of the spacer.
20. 20. The semiconductor device of claim 11, wherein a vertical thickness of the spacer is less than a vertical thickness of the spacer.

Description

Semiconductor device and method for forming the same Technical Field The invention relates to a semiconductor element and a forming method thereof. Background In the process of removing the photoresist layer by ashing with a mixed gas such as O 2/H2N2 or O 2/NH3, oxidation of the metal layer may occur, which may increase the resistance of the semiconductor device and thus increase the operating voltage. Disclosure of Invention An aspect of the present invention provides a method of forming a semiconductor device, comprising patterning a gate stack using a patterned photoresist layer, wherein the gate stack comprises a conductive layer, a metal layer on the conductive layer, and a hard mask layer over the metal layer, and removing the patterned photoresist layer using a nitrogen-containing gas, wherein a liner is formed on the metal layer of the gate stack during the removal of the patterned photoresist layer. In some embodiments, the conductive layer is comprised of polysilicon, the metal layer is comprised of tungsten, and the hard mask layer is comprised of an oxide or nitride. In some embodiments, the liner is composed of a nitride of the metal layer. In some embodiments, the liner is comprised of tungsten nitride (WN x). In some embodiments, the nitrogen-containing gas is a diimine (H 2N2). In some embodiments, removing the patterned photoresist layer is performed by using pure diimine (H 2N2). In some embodiments, the patterned photoresist layer is removed without the use of an oxygen-containing gas. In some embodiments, the method further includes forming spacers along sidewalls of the gate stack after removing the patterned photoresist layer. In some embodiments, a liner is located between the spacer and the metal layer of the gate stack. In some embodiments, the metal layer of the gate stack is separated from the spacer by a spacer. An aspect of the present invention provides a semiconductor element comprising a substrate, a gate stack over the substrate, a liner over the metal layer of the gate stack, and a spacer along a sidewall of the gate stack. The gate stack includes a conductive layer, a metal layer over the conductive layer, and a mask layer over the metal layer. In some embodiments, the conductive layer is comprised of polysilicon, the metal layer is comprised of tungsten, and the hard mask layer is comprised of an oxide or nitride. In some embodiments, the liner is composed of a nitride of the metal layer. In some embodiments, the liner is comprised of tungsten nitride (WN x). In some embodiments, a liner is located between the spacer and the metal layer of the gate stack. In some embodiments, the metal layer of the gate stack is separated from the spacer by a spacer. In some embodiments, the conductive layer contacts the spacer. In some embodiments, the hard mask layer contacts the spacers. In some embodiments, the lateral width of the spacer is less than the lateral width of the spacer. In some embodiments, the vertical thickness of the spacer is less than the vertical thickness of the spacer. Drawings The aspects of the present disclosure are best understood from the following detailed description when read with the accompanying drawing figures. Note that the various features are not drawn to scale according to standard practices in the industry. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion. Fig. 1-9 illustrate cross-sectional views of various stages in the manufacture of a semiconductor device in accordance with some embodiments of the present invention. FIG. 10 illustrates a circuit diagram of a memory array and sense amplifier rows according to some embodiments of the invention. Fig. 11 illustrates a circuit diagram of a memory cell of a memory element according to some embodiments of the invention. Detailed Description The following disclosure provides many different embodiments, or examples, for implementing different features of the provided objects. Specific examples of components and arrangements are described below to simplify the present disclosure. Of course, these are merely examples and are not intended to be limiting. For example, in the description that follows, the formation of a first feature over or on a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features such that the first and second features may not be in direct contact. Moreover, in various examples, this disclosure may repeat reference numerals and/or letters. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. In addition, for ease of description, spatially relative terms such as "under", "below", "lower", "above" and "upper" and the like may be used herein to