CN-121985590-A - Bidirectional transient voltage suppressor with low dynamic resistance and high surge capacity

CN121985590ACN 121985590 ACN121985590 ACN 121985590ACN-121985590-A

Abstract

The invention provides a bidirectional transient voltage suppressor with low dynamic resistance and high surge capacity, which comprises a heavily doped first conductive type semiconductor substrate, a first epitaxial layer arranged on the substrate, a conduction modulation buried layer arranged on the first epitaxial layer, a second epitaxial layer arranged on the conduction modulation buried layer, a heavily doped first conductive type region arranged on the second epitaxial layer, a first electrode arranged on the front surface of the heavily doped first conductive type region and a second electrode arranged on the back surface of the substrate, wherein the conduction modulation buried layer is arranged in the double epitaxial body region and is configured to form a carrier high-concentration conduction modulation region under the transient high-current impact condition, and a conduction path leading in a body region is formed between the first epitaxial layer and the second epitaxial layer, so that conduction current is intensively conducted from a PN junction local region to be converted into an overall conduction mode which is transversely spread in the body region and is distributed in a plane shape, thereby reducing the dynamic resistance of a device and improving the surge bearing capacity of the device.

Inventors

ZHU WEIDONG
ZHAO BORAN

Assignees

江苏应能微电子股份有限公司

Dates

Publication Date: 20260505
Application Date: 20260409

Claims (8)

1. A low dynamic resistance high surge capability bi-directional transient voltage suppressor comprising: heavily doping the first conductive type semiconductor substrate; the first epitaxial layer is arranged on the substrate and is of a second conductivity type; the conduction modulation buried layer is arranged on the first epitaxial layer and is of a second conductivity type; The second epitaxial layer is arranged on the conduction modulation buried layer and is of a second conductivity type; a heavily doped first conductivity type region disposed on the second epitaxial layer; A first electrode arranged on the front surface of the heavily doped first conductive type region and a second electrode arranged on the back surface of the substrate; The first conductive type is N-type, the second conductive type is P-type, or the first conductive type is P-type, the second conductive type is N-type; the thicknesses of the first epitaxial layer and the second epitaxial layer are the same or the deviation is within a set range, and the doping concentrations of the first epitaxial layer and the second epitaxial layer are the same or the deviation is within the set range; The thickness of the conduction modulation buried layer is smaller than the thickness of the first epitaxial layer and the second epitaxial layer; The conduction modulation buried layer is arranged in a body region between the first epitaxial layer and the second epitaxial layer; the on modulation buried layer, the first epitaxial layer and the second epitaxial layer form a continuous body region structure in space, and a main PN junction between the on modulation buried layer and the first epitaxial layer and a main PN junction between the second epitaxial layer and the heavily doped first conductive type region are kept at preset intervals; The conducting modulation buried layer is configured to not form a main conducting path before static breakdown of the device, form a carrier high-concentration conducting modulation area under a transient high-current impact condition, and form a conducting path leading to body area conducting modulation between the first epitaxial layer and the second epitaxial layer, so that the whole conducting modulation conduction of the body area is triggered, and the conducting current is converted from a PN junction local area concentrated conducting mode to a whole conducting mode which is transversely expanded in the body area range and is distributed in a planar mode; the doping concentration of the conduction modulation buried layer is 8-12 times of the doping concentration of the first epitaxial layer and the second epitaxial layer; The thickness of the conduction modulation buried layer is 1-5 mu m, and the thicknesses of the first epitaxial layer and the second epitaxial layer are 15-30 mu m.
2. The low dynamic resistance high surge capability bi-directional transient voltage suppressor of claim 1, The doping concentration of the conduction modulation buried layer is 8-10 times of the doping concentration of the first epitaxial layer and the second epitaxial layer.
3. A low dynamic resistance high surge capability bi-directional transient voltage suppressor as defined in claim 1 or 2, The doping concentration of the conduction modulation buried layer is 1x10 16 cm -3 ～2x10 17 cm -3 , and the doping concentration of the first epitaxial layer and the second epitaxial layer is 5x10 14 cm -3 ～8x10 16 cm -3 .
4. A low dynamic resistance high surge capability bi-directional transient voltage suppressor as defined in claim 1 or 2, The thickness of the conduction modulation buried layer is 2-4 mu m, and the thicknesses of the first epitaxial layer and the second epitaxial layer are 20-25 mu m.
5. A low dynamic resistance high surge capability bi-directional transient voltage suppressor as defined in claim 1 or 2, The bidirectional transient voltage suppressor further comprises at least one circle of deep isolation groove which is arranged around the chip active region, the deep isolation groove penetrates through the second epitaxial layer, the conduction modulation buried layer and the first epitaxial layer and extends to the inside of the substrate, and insulating materials are filled in the deep isolation groove.
6. The low dynamic resistance high surge capability bi-directional transient voltage suppressor of claim 5, The depth of the deep isolation groove is 20-70 mu m, and the width is 1-5 mu m.
7. A low dynamic resistance high surge capability bi-directional transient voltage suppressor as defined in claim 1 or 2, The doping concentration of the substrate is 1x10 19 cm -3 ～8x10 19 cm -3 .
8. The bi-directional transient voltage suppressor of low dynamic resistance and high surge capability of claim 1 or 2, wherein said heavily doped first conductivity type region has a junction depth of 1 μm to 3 μm and a doping concentration of 1x10 19 cm -3 ～1x10 20 cm -3 .

Description

Bidirectional transient voltage suppressor with low dynamic resistance and high surge capacity Technical Field The invention relates to the technical field of semiconductor transient overvoltage protection devices, in particular to a bidirectional transient voltage suppressor with low dynamic resistance and high surge capacity, which can meet the requirements of vehicle-standard level reliability. Background The Transient Voltage Suppressor (TVS) is a circuit protection device widely applied to the fields of automobile electronics, industrial control, communication equipment and the like, and has the main functions of rapidly conducting and clamping voltage when a circuit suffers overvoltage transient interference, and discharging overvoltage energy so as to protect a later-stage circuit from damage. Along with the continuous improvement of the electronic degree of automobiles, particularly the rapid development of electric automobiles and intelligent driving systems, the vehicle-mounted electronic system provides higher performance requirements for TVS devices, and particularly in a 40V-80V medium-high voltage vehicle-mounted system, the requirements for low dynamic resistance and high surge bearing capacity are increasingly outstanding. The current common bidirectional TVS implementation mainly includes: 1. two unidirectional TVS chips are packaged back to form a bidirectional TVS structure. 2. PNPN or double-epitaxial structure, and through parasitic NPN/PNP triode, two-way breakdown is realized. 3. The symmetrical doping forms a common bi-directional avalanche structure of back-to-back PN junctions. However, the above structure still has obvious disadvantages in practical application: First, the dynamic resistance is higher The traditional bidirectional TVS still takes PN junction local avalanche or parasitic triode conduction as a leading mode in a large current conduction stage, the equivalent conduction path is concentrated, the dynamic resistance is higher, and the clamping voltage is higher. Second, current concentration and hot spot problems are prominent Because the conduction region is mainly concentrated near the PN junction, transient current is easy to gather in a local region, hot spots are formed, and local overheating and even failure are caused. Third, surge capacity is limited The bearing capacity of the traditional bidirectional TVS under the standard surge condition of 8/20 mu s and the like is difficult to further improve under the influence of current concentration and higher dynamic resistance. Fourth, it is difficult to meet the reliability requirements of the vehicle gauge Under the repeated surge impact condition, the traditional structure is easy to have performance drift or degradation, and is difficult to meet the requirements of AEC-Q101 and other vehicle-standard level reliability, particularly in 40-80V medium-high voltage vehicle-mounted systems (such as EPS, battery management systems, OBC, motor driving and the like), a novel bidirectional TVS structure capable of simultaneously realizing low dynamic resistance and high surge capacity in a single-chip structure is needed. Disclosure of Invention In order to solve at least one technical problem in the prior art, the embodiment of the invention provides a bidirectional transient voltage suppressor with low dynamic resistance and high surge capacity. In order to achieve the technical purpose, the technical scheme adopted by the embodiment of the invention is as follows: the embodiment of the invention provides a bidirectional transient voltage suppressor with low dynamic resistance and high surge capacity, which comprises the following components: heavily doping the first conductive type semiconductor substrate; the first epitaxial layer is arranged on the substrate and is of a second conductivity type; the conduction modulation buried layer is arranged on the first epitaxial layer and is of a second conductivity type; The second epitaxial layer is arranged on the conduction modulation buried layer and is of a second conductivity type; a heavily doped first conductivity type region disposed on the second epitaxial layer; A first electrode arranged on the front surface of the heavily doped first conductive type region and a second electrode arranged on the back surface of the substrate; The first conductive type is N-type, the second conductive type is P-type, or the first conductive type is P-type, the second conductive type is N-type; the thicknesses of the first epitaxial layer and the second epitaxial layer are the same or the deviation is within a set range, and the doping concentrations of the first epitaxial layer and the second epitaxial layer are the same or the deviation is within the set range; The thickness of the conduction modulation buried layer is smaller than the thickness of the first epitaxial layer and the second epitaxial layer; The conduction modulation buried layer is arranged in a body region between