CN-121985613-A - Chip and method for manufacturing chip
Abstract
The embodiment of the application discloses a chip and a manufacturing method of the chip. The chip comprises an optical waveguide, and the method comprises the steps of providing a layer to be etched, forming a mask layer on the layer to be etched, forming a photoresist pattern, forming an adsorbate on the side wall of the photoresist pattern, etching the mask layer by taking the photoresist pattern attached with the adsorbate as a mask, and etching the layer to be etched based on the patterned mask layer to form the optical waveguide. The application reduces the surface roughness of the photoresist pattern by forming the adsorbate on the side wall of the photoresist pattern, thereby reducing the surface roughness of the optical waveguide and improving the signal transmission performance of the optical waveguide.
Inventors
- MENG HUAIYU
- SHEN YICHEN
- ZHANG ZIHAN
Assignees
- 上海曦智科技股份有限公司
Dates
- Publication Date
- 20260505
- Application Date
- 20241028
Claims (10)
- 1. A method of manufacturing a chip, the chip comprising an optical waveguide, the method comprising: Providing a layer to be etched; Forming a mask layer on the layer to be etched; forming a photoresist pattern, wherein the photoresist pattern comprises a top surface and side walls; forming an adsorbate on sidewalls of the photoresist pattern; etching the mask layer by taking the photoresist pattern attached with the adsorbate as a mask so as to form a patterned mask layer; And etching the layer to be etched based on the patterned mask layer to form the optical waveguide.
- 2. The method of manufacturing of claim 1, wherein forming adsorbates on sidewalls of the photoresist pattern comprises: performing at least one cycling step, the cycling step comprising: Forming a deposition layer on the photoresist pattern, wherein the deposition layer covers the photoresist pattern; And a second substep of etching to remove a part of the deposited layer, wherein at least a part of the remained deposited layer after etching is remained on the side wall of the photoresist pattern, so as to form an adsorbate on the side wall of the photoresist pattern.
- 3. The method of claim 2, wherein the cycling step is performed between 2 and 5 times.
- 4. The method of manufacturing as claimed in claim 2, wherein the photoresist pattern after the recycling step has a height smaller than that of the photoresist pattern after the previous recycling step or smaller than that of the photoresist pattern after the non-recycling step.
- 5. The method of manufacturing of claim 2, wherein in the first substep, the deposited layer covers the top surface and sidewalls of the photoresist pattern; In the second substep, etching to remove a portion of the deposited layer includes etching the deposited layer on the top surface at a greater rate than the deposited layer on the sidewall.
- 6. The method of manufacturing of claim 1, wherein the adsorbate material is a carbon polymer.
- 7. The method of manufacturing of claim 1, wherein the chip further comprises a substrate, the substrate being a silicon-on-insulator SOI substrate comprising a bottom silicon, a buried oxide layer and the layer to be etched in that order.
- 8. The method of any one of claims 1 to 7, wherein the material of the layer to be etched is silicon.
- 9. A chip manufactured by the method of any one of claims 1 to 8.
- 10. The chip of claim 9, comprising at least one of a grating coupler, an optical modulator, a directional coupler, a multimode interferometer, a photodetector, and an optical beam splitter.
Description
Chip and method for manufacturing chip Technical Field The present application relates to the field of semiconductors, and more particularly, to a chip and a method for manufacturing the chip. Background In a chip, waveguides are critical structures for guiding and controlling optical signals. The roughness of the waveguide surface causes scattering of light, increasing propagation loss. Disclosure of Invention The application provides a chip and a manufacturing method thereof, and aims to solve the problem of rough surface of an optical waveguide in the prior art. According to a first aspect of the application, the application provides a manufacturing method of a chip, the chip comprises an optical waveguide, the method comprises the steps of providing a layer to be etched, forming a mask layer on the layer to be etched, forming a photoresist pattern, wherein the photoresist pattern comprises a top surface and side walls, performing at least one circulation step, the circulation step comprises the steps of firstly forming a deposition layer on the photoresist pattern, enabling the deposition layer to cover the photoresist pattern, secondly etching to remove a part of the deposition layer, reserving at least a part of the remained deposition layer after etching on the side walls of the photoresist pattern to form an adsorbate on the side walls of the photoresist pattern, after the at least one circulation step is completed, etching the mask layer by using the photoresist pattern attached with the adsorbate as a mask to form a patterned mask layer, and etching the layer to be etched based on the patterned mask layer to form the optical waveguide. In some embodiments, the cycling step is performed between 2 and 5 times. In some embodiments, the photoresist pattern after the recycling step is performed has a height less than the height of the photoresist pattern after the last recycling step, or less than the height of the photoresist pattern after the non-recycling step. In some embodiments, in the first substep, the deposited layer covers the top surface and the sidewalls of the photoresist pattern, and in the second substep, etching to remove a portion of the deposited layer includes etching the deposited layer on the top surface at a greater rate than the deposited layer on the sidewalls. In some embodiments, the material of the adsorbate is a carbon polymer. In some embodiments, the chip further comprises a substrate, wherein the substrate is a silicon-on-insulator (SOI) substrate, and the substrate comprises a bottom silicon layer, an oxygen-buried layer and the layer to be etched which are sequentially arranged. In some embodiments, the material of the layer to be etched is silicon. According to a first aspect of the present application there is provided a chip manufactured by the method of any one of the first aspects described above. By one or more of the above embodiments of the present application, at least the technical effect that the formation of the adsorbate on the sidewall of the photoresist pattern reduces the surface roughness of the sidewall of the photoresist pattern, thereby reducing the surface roughness of the patterned mask layer, and the surface roughness of the optical waveguide can be reduced and the light transmission performance of the optical waveguide can be improved due to the etching formation of the optical waveguide based on the patterned mask layer can be realized. Drawings The technical solution and other advantageous effects of the present application will be made apparent by the following detailed description of the specific embodiments of the present application with reference to the accompanying drawings. FIGS. 1-3 illustrate steps associated with the inventors' discovery of problems in the fabrication of photonic integrated chips; FIG. 4 shows a flow chart of steps of a method of manufacturing a chip according to an embodiment of the invention; FIG. 5 shows a schematic diagram of a substrate according to an embodiment of the invention; FIG. 6 is a schematic diagram of a mask layer formed on a layer to be etched according to an embodiment of the present invention; FIG. 7 is a schematic diagram of a photoresist layer formed on a mask layer according to an embodiment of the invention; FIG. 8 is a schematic diagram after forming a photoresist pattern according to an embodiment of the present invention; FIG. 9 is a schematic diagram of a sub-step one forming a deposition layer according to an embodiment of the present invention; FIG. 10 shows a schematic diagram after performing a sub-step two etch to remove a portion of the deposited layer, in accordance with an embodiment of the present invention; FIG. 11 shows a schematic diagram after at least one cycling step is performed, in accordance with an embodiment of the present invention; FIG. 12 is a schematic diagram of a photoresist pattern as a mask after etching the mask layer according to an embodiment of the present in