Search

CN-121985683-A - Display device

CN121985683ACN 121985683 ACN121985683 ACN 121985683ACN-121985683-A

Abstract

A display device is disclosed. The display device includes a substrate, a first planarization layer disposed on the substrate, conductive patterns disposed on the first planarization layer and spaced apart from each other, a barrier layer disposed on the first planarization layer, at least a portion of a top surface of the conductive patterns not covered by the barrier layer, and a second planarization layer disposed on the conductive patterns and the barrier layer. The present disclosure improves the flatness of the pixel electrode and reduces outgassing from the planarization layer, thereby realizing a low power display device.

Inventors

  • LI ENHUI
  • HONG JIXIANG
  • Ren Xianzhe

Assignees

  • 乐金显示有限公司

Dates

Publication Date
20260505
Application Date
20250829
Priority Date
20241031

Claims (20)

  1. 1. A display device, the display device comprising: A substrate; A first of the planarization layers is provided with a first planarizing layer, the first planarization layer is arranged on the substrate; Conductive patterns disposed on the first planarization layer, adjacent conductive patterns being spaced apart from each other; a barrier layer disposed on the first planarization layer and at least a portion of a top surface of the conductive pattern is not covered by the barrier layer, and A second planarization layer disposed on the conductive pattern and the barrier layer, Wherein the barrier layer includes a via hole between the conductive patterns.
  2. 2. The display device according to claim 1, Wherein the first planarization layer and the second planarization layer contact each other at the via hole.
  3. 3. The display device of claim 1, further comprising a bank disposed on the second planarizing layer and comprising an opening, Wherein the opening overlaps at least a portion of the conductive pattern.
  4. 4. A display device according to claim 3, Wherein the through hole is not provided in a region overlapping the opening.
  5. 5. A display device according to claim 3, Wherein the openings comprise a first opening and a second opening, Wherein the conductive pattern includes a data line for transmitting a data voltage and a driving voltage line for transmitting a high-level driving voltage, Wherein the first opening is arranged to overlap at least part of the data line, and Wherein the second opening is disposed to overlap at least a portion of the driving voltage line.
  6. 6. The display device according to claim 1, Wherein the barrier layer is disposed in contact with at least a portion of the side surface of the conductive pattern, and Wherein the second planarization layer is in contact with a top surface of at least the portion of the conductive pattern.
  7. 7. The display device according to claim 1, Wherein the barrier layer is disposed in contact with the underside of at least part of the side surface of the conductive pattern and is disposed spaced apart from the upper side of at least said part of the side surface of the conductive pattern, and Wherein the second planarization layer is in contact with an upper side and a top surface of at least the side surface of the portion of the conductive pattern.
  8. 8. The display device according to claim 1, Wherein the barrier layer is disposed spaced apart from at least a portion of the conductive pattern, and Wherein the second planarization layer is disposed in contact with side surfaces and top surfaces of at least the portion of the conductive pattern.
  9. 9. The display device according to claim 1, Wherein the first and second planarizing layers comprise an organic insulating material, and Wherein the barrier layer comprises an inorganic insulating material.
  10. 10. The display device according to claim 5, Wherein the conductive pattern further comprises a relay electrode, and Wherein the relay electrode is disposed to overlap with the contact hole in the first planarization layer.
  11. 11. The display device of claim 10, further comprising a transistor disposed on the substrate, Wherein the transistor includes a source electrode, a drain electrode, an active layer, and a gate electrode disposed to overlap the active layer, and Wherein the relay electrode is electrically connected to the source electrode through the contact hole of the first planarization layer.
  12. 12. The display apparatus according to claim 11, further comprising a light emitting device disposed on the second planarization layer, Wherein the light emitting device includes: a pixel electrode disposed on the second planarization layer; an intermediate layer provided on the pixel electrode, and A common electrode disposed on the intermediate layer, Wherein the pixel electrode is electrically connected to the relay electrode through a contact hole of the second planarization layer.
  13. 13. The display device according to claim 1, wherein the barrier layer is disposed on the first planarization layer such that the barrier layer does not cover an entire top surface of the conductive pattern.
  14. 14. The display device according to claim 1, wherein the conductive pattern includes a first conductive pattern, a second conductive pattern, and a third conductive pattern, and Wherein the first conductive pattern is a data line for transmitting a data voltage, the second conductive pattern is a driving voltage line for transmitting a high-level driving voltage, and the third conductive pattern is a relay electrode.
  15. 15. A display device, the display device comprising: A substrate; A first of the planarization layers is provided with a first planarizing layer, the first planarization layer is arranged on the substrate; A conductive pattern disposed on the first planarization layer and disposed along a first direction; a barrier layer disposed on the first planarization layer; a second planarization layer disposed on the conductive pattern and the barrier layer; a pixel electrode disposed on the second planarization layer, and A bank disposed on the pixel electrode and including an opening exposing a portion of a top surface of the pixel electrode, Wherein the barrier layer comprises an open area in which at least a portion of the top surface of the conductive pattern is not covered by the barrier layer, and Wherein the open area overlaps at least a portion of the pixel electrode.
  16. 16. The display device according to claim 15, Wherein the open area corresponds to the pixel electrode.
  17. 17. The display device according to claim 15, Wherein the open area corresponds to the opening.
  18. 18. The display device according to claim 15, Wherein the second planarization layer is disposed on the conductive pattern at the open area.
  19. 19. The display device according to claim 15, Wherein adjacent conductive patterns are arranged to be spaced apart in a second direction perpendicular to the first direction, Wherein the barrier layer includes a via hole between the conductive patterns, and Wherein the first planarization layer and the second planarization layer contact each other at the via hole.
  20. 20. A display device, the display device comprising: A substrate; A first of the planarization layers is provided with a first planarizing layer, the first planarization layer is arranged on the substrate; Conductive patterns located on the first planarization layer and extending in a first direction, adjacent conductive patterns being disposed to be spaced apart in a second direction perpendicular to the first direction; a barrier layer disposed on the first planarization layer; a second planarization layer disposed on the conductive pattern and the barrier layer, and A light emitting region disposed to overlap the conductive pattern, Wherein the barrier layer comprises an open area in which at least a portion of the top surface of the conductive pattern is not covered by the barrier layer, and Wherein the open area overlaps at least a portion of the light emitting area.

Description

Display device Technical Field The present disclosure relates to a display device, and more particularly, for example, but not limited to, a display device in which flatness of a pixel electrode is improved. Background With the development of information society, demand for display devices that display images has increased, and various types of display devices such as liquid crystal display devices and light emitting display devices are being used. The light emitting display apparatus includes a light emitting device that emits light in a display region, and the light emitting device includes an anode, a light emitting layer, and a cathode. The light emitting device must be formed on a flat surface to uniformly and uniformly emit light. Various components including wirings for supplying signals and voltages and driving elements are formed under the light emitting device. These components cause surface irregularities and result in height differences. A planarization layer made of an organic material may be provided to stably position the light emitting device on the planarized surface and planarize a lower portion of the light emitting device. The description provided in the description of the background section should not be assumed to be prior art merely because it was mentioned in or associated with the description of the background section. The description of the background section may include information describing one or more aspects of the subject technology, and the description of this section is not intended to limit the disclosure. Disclosure of Invention The inventors have recognized problems and disadvantages in the related art. Accordingly, exemplary embodiments of the present disclosure may provide a display device flatness in which flatness of a pixel electrode is improved. Exemplary embodiments of the present disclosure may provide a display device having improved visibility under reflected light. Exemplary embodiments of the present disclosure may provide a display device that improves gas release from a planarization layer. The objects of the exemplary embodiments of the present disclosure are not limited to the above objects, and other objects not specifically mentioned will be clearly understood by those skilled in the art from the following description. Exemplary embodiments of the present disclosure may provide a display device including a substrate, a first planarization layer disposed on the substrate, conductive patterns disposed on the first planarization layer, adjacent conductive patterns spaced apart from each other, a barrier layer disposed on the first planarization layer and at least a portion of a top surface of the conductive patterns not covered by the barrier layer, and a second planarization layer disposed on the conductive patterns and the barrier layer, wherein the barrier layer includes a via hole between the conductive patterns. Exemplary embodiments of the present disclosure may provide a display device including a substrate, a first planarization layer disposed on the substrate, a conductive pattern on the first planarization layer and arranged in a first direction, a barrier layer disposed on the first planarization layer, a second planarization layer disposed on the conductive pattern and the barrier layer, a pixel electrode disposed on the second planarization layer, and a bank disposed on the pixel electrode and including an opening exposing a portion of a top surface of the pixel electrode, wherein the barrier layer includes an open area, wherein at least a portion of the top surface of the conductive pattern is not covered by the barrier layer, and the open area is positioned to overlap at least a portion of the pixel electrode. Exemplary embodiments of the present disclosure may provide a display device including a substrate, a first planarization layer disposed on the substrate, conductive patterns located on the first planarization layer and extending in a first direction, adjacent conductive patterns spaced apart in a second direction perpendicular to the first direction, a barrier layer disposed on the conductive patterns and the first planarization layer, a second planarization layer disposed on the conductive patterns and the barrier layer, and a light emitting region disposed to overlap the conductive patterns, wherein the barrier layer includes an open region, wherein at least a portion of a top surface of the conductive patterns is uncovered, and the open region is positioned to overlap at least a portion of the light emitting region. Exemplary embodiments of the present disclosure may provide a display device in which the barrier layer includes a via hole between conductive patterns, and the first and second planarization layers may contact each other at the via hole. Exemplary embodiments of the present disclosure may provide a display panel including a substrate, a first planarization layer disposed on the substrate, conductive patterns disposed o