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CN-121985684-A - Display panel and display device

CN121985684ACN 121985684 ACN121985684 ACN 121985684ACN-121985684-A

Abstract

The application discloses a display panel and a display device, wherein the display panel comprises a first transistor and a second transistor, the second active layer comprises an oxide semiconductor, the carrier mobility of the second active layer is larger than that of the first active layer, and the second active layer comprises a first oxide semiconductor layer and a second oxide semiconductor layer which are stacked. The first oxide semiconductor layer includes indium, gallium, and zinc, and the second oxide semiconductor layer includes indium, gallium, tin, and zinc, and the first indium ratio is smaller than the second indium ratio, and the first gallium ratio is larger than the second gallium ratio. According to the embodiment of the application, the first indium ratio is smaller than the second indium ratio in the second active layer, the first gallium ratio is larger than the second gallium ratio, so that the requirement of high mobility of the second transistor is met, the electrical stability of the first oxide semiconductor layer is higher, surrounding hydrogen can be prevented from penetrating into the second oxide semiconductor layer, and the risk of negative bias of the threshold voltage of the second transistor is reduced.

Inventors

  • YU MINGJUE

Assignees

  • 广州华星光电半导体显示技术有限公司

Dates

Publication Date
20260505
Application Date
20260121

Claims (15)

  1. 1. A display panel comprising a display area and a non-display area on at least one side of the display area, the display panel comprising: a first transistor disposed in the display region, the first transistor including a first active layer including an oxide semiconductor; a second transistor disposed in the non-display region, the second transistor including a second active layer including an oxide semiconductor, the second active layer having a carrier mobility greater than that of the first active layer, the second active layer including a first oxide semiconductor layer and a second oxide semiconductor layer stacked; The first oxide semiconductor layer comprises indium, gallium and zinc, the second oxide semiconductor layer comprises indium, gallium, tin and zinc, the percentage of the atomic number of indium in the first oxide semiconductor layer to the total atomic number of all metal elements in the first oxide semiconductor layer is a first indium ratio, the percentage of the atomic number of gallium in the first oxide semiconductor layer to the total atomic number of all metal elements in the first oxide semiconductor layer is a first gallium ratio, the percentage of the atomic number of indium in the second oxide semiconductor layer to the total atomic number of all metal elements in the second oxide semiconductor layer is a second indium ratio, the percentage of the atomic number of gallium in the second oxide semiconductor layer to the total atomic number of all metal elements in the second oxide semiconductor layer is a second gallium ratio, the first indium ratio is smaller than the second indium ratio, and the first gallium ratio is larger than the second gallium ratio.
  2. 2. The display panel of claim 1, wherein a ratio of the second indium ratio to the first indium ratio is between 1.05 and 1.51, and a ratio of the second gallium ratio to the first gallium ratio is between 0.45 and 0.75.
  3. 3. The display panel of claim 2, wherein the value of the second indium ratio to the second gallium ratio is greater than the value of the first indium ratio to the first gallium ratio.
  4. 4. A display panel according to claim 3, characterized in that the ratio of the second indium ratio to the second gallium ratio has a value greater than or equal to 2, the ratio of the first indium ratio to the first gallium ratio having a value comprised between 0.9 and 1.1.
  5. 5. The display panel according to claim 2, wherein a carrier concentration of the second oxide semiconductor layer is larger than a carrier concentration of the first oxide semiconductor layer.
  6. 6. The display panel according to any one of claims 1 to 5, wherein In the second oxide semiconductor layer, the percentage of the total atomic number of all metal elements is 35≤Inat≤ 50,15≤Gaat≤25, 5≤Sn at≤10, 20≤Zn at≤40, respectively; Wherein, in at.% is atomic percent of indium, ga at.% is atomic percent of gallium, sn at.% is atomic percent of tin, zn at.% is atomic percent of zinc; in the first oxide semiconductor layer, the total atomic number ratio of each metal element is indium to gallium to zinc=1:1:1.
  7. 7. The display panel according to any one of claims 1 to 5, wherein a thickness ratio of the second oxide semiconductor layer and the first oxide semiconductor layer is between 0.25 and 6.
  8. 8. The display panel according to any one of claims 1 to 5, wherein the second oxide semiconductor layer is located on a side of the first oxide semiconductor layer close to a gate electrode of the second transistor, or; the second oxide semiconductor layer is located at a side of the first oxide semiconductor layer away from the gate electrode of the second transistor.
  9. 9. The display panel according to claim 8, wherein a material composition of the first oxide semiconductor layer and a material composition of the first active layer are the same.
  10. 10. The display panel according to claim 8, wherein the second active layer further comprises a third oxide semiconductor layer, wherein the second oxide semiconductor layer is provided between the first oxide semiconductor layer and the third oxide semiconductor layer, and wherein carrier mobility of the third oxide semiconductor layer is smaller than carrier mobility of the second oxide semiconductor layer.
  11. 11. The display panel according to claim 10, wherein carrier mobility of the third oxide semiconductor layer is less than or equal to carrier mobility of the first oxide semiconductor layer.
  12. 12. The display panel according to claim 11, wherein a material composition of the third oxide semiconductor layer and a material composition of the first oxide semiconductor layer are the same.
  13. 13. The display panel of claim 8, wherein the display panel comprises a substrate, a buffer layer, a first gate insulating layer, a second gate insulating layer, a first metal layer, a third gate insulating layer, a second metal layer, an interlayer dielectric layer, a third metal layer, and a passivation layer; The buffer layer is arranged on the substrate, the first active layer is arranged on one side, far away from the substrate, of the buffer layer, the first gate insulation layer covers the first active layer, the second active layer is arranged on one side, far away from the substrate, of the first gate insulation layer, the second gate insulation layer covers the first gate insulation layer and the second active layer, the first metal layer is arranged on one side, far away from the substrate, of the second gate insulation layer, and the first metal layer comprises a gate electrode of the first transistor and a gate electrode of the second transistor; The third gate insulating layer covers the first metal layer, the second metal layer is arranged on one side of the third gate insulating layer far away from the substrate, the interlayer dielectric layer covers the second metal layer and the third gate insulating layer, the third metal layer is arranged on one side of the interlayer dielectric layer far away from the substrate, the third metal layer comprises a source electrode and a drain electrode of the first transistor and a source electrode and a drain electrode of the second transistor, and the passivation layer covers the third metal layer; the hydrogen content of the second gate insulating layer is lower than that of the first gate insulating layer, and the hydrogen content of the first gate insulating layer and the hydrogen content of the second gate insulating layer are lower than those of the interlayer dielectric layer and the passivation layer.
  14. 14. The display panel according to any one of claims 1 to 5, wherein the first transistor is applied to a pixel circuit and the second transistor is applied to at least one of a gate driving circuit and a demultiplexing circuit.
  15. 15. A display device comprising a display panel as claimed in any one of claims 1-14.

Description

Display panel and display device Technical Field The present application relates to the field of display technologies, and in particular, to a display panel and a display device. Background In the current organic light emitting diode panel, a pixel circuit is arranged in a display area, a grid driving circuit is arranged in a frame area, wherein a thin film transistor of the pixel circuit needs to realize high-stability driving current output, the grid driving circuit needs to realize smaller device size and high-strength driving capability by using the thin film transistor, and simultaneously, the stability of the thin film transistor of the display area and the high-migration capability of the thin film transistor of the grid driving circuit area have larger technical challenges. Secondly, in order to simultaneously realize the stability of the thin film transistor of the display area and the high migration capability of the thin film transistor of the gate driving circuit area, in the prior art, an all-metal oxide semiconductor is adopted as an active layer of a transistor device, a device of the gate driving circuit adopts a high mobility oxide semiconductor, and a device of the display area adopts a high stability oxide semiconductor, but the environmental conditions around the device of the gate driving circuit and the device of the display area are similar, and the device of the gate driving circuit is easily influenced by environmental conditions (such as hydrogen) due to the requirement of high mobility, so that the threshold voltage is negatively biased. Disclosure of Invention The embodiment of the application provides a display panel and a display device, which aim to at least partially solve the technical problems. In order to achieve the above object, according to a first aspect of the present application, there is provided a display panel including a display area and a non-display area located on at least one side of the display area, the display panel including: a first transistor disposed in the display region, the first transistor including a first active layer including an oxide semiconductor; a second transistor disposed in the non-display region, the second transistor including a second active layer including an oxide semiconductor, the second active layer having a carrier mobility greater than that of the first active layer, the second active layer including a first oxide semiconductor layer and a second oxide semiconductor layer stacked; The first oxide semiconductor layer comprises indium, gallium and zinc, the second oxide semiconductor layer comprises indium, gallium, tin and zinc, the percentage of the atomic number of indium in the first oxide semiconductor layer to the total atomic number of all metal elements in the first oxide semiconductor layer is a first indium ratio, the percentage of the atomic number of gallium in the first oxide semiconductor layer to the total atomic number of all metal elements in the first oxide semiconductor layer is a first gallium ratio, the percentage of the atomic number of indium in the second oxide semiconductor layer to the total atomic number of all metal elements in the second oxide semiconductor layer is a second indium ratio, the percentage of the atomic number of gallium in the second oxide semiconductor layer to the total atomic number of all metal elements in the second oxide semiconductor layer is a second gallium ratio, the first indium ratio is smaller than the second indium ratio, and the first gallium ratio is larger than the second gallium ratio. Optionally, in some embodiments of the application, the ratio of the second indium ratio to the first indium ratio is between 1.05 and 1.51, and the ratio of the second gallium ratio to the first gallium ratio is between 0.45 and 0.75. Optionally, in some embodiments of the application, the value of the second indium ratio to the second gallium ratio is greater than the value of the first indium ratio to the first gallium ratio. Optionally, in some embodiments of the application, a value of a ratio of the second indium ratio to the second gallium ratio is greater than or equal to 2, and a value of a ratio of the first indium ratio to the first gallium ratio is between 0.9 and 1.1. Optionally, in some embodiments of the present application, the carrier concentration of the second oxide semiconductor layer is greater than the carrier concentration of the first oxide semiconductor layer. Alternatively, in some embodiments of the present application, the percentages of the total atomic numbers of all metal elements In the second oxide semiconductor layer are 35≤Inat≤ 50,15≤Ga at≤25, 5≤Sn at≤10, 20≤Zn at≤40, respectively; Wherein, in at.% is atomic percent of indium, ga at.% is atomic percent of gallium, sn at.% is atomic percent of tin, zn at.% is atomic percent of zinc; in the first oxide semiconductor layer, the total atomic number ratio of each metal element is indium to gallium to zinc=1