Search

CN-121985736-A - Process integration method of trench memristor

CN121985736ACN 121985736 ACN121985736 ACN 121985736ACN-121985736-A

Abstract

The invention discloses a process integration method of a groove type memristor, which comprises the steps of providing a silicon substrate, preparing an inert electrode on the surface of the silicon substrate, depositing a layer of silicon nitride on the surface of the inert electrode, photoetching and etching the silicon nitride to form a groove type SiN structure, stopping over etching until the silicon nitride reaches the inert electrode, preparing electrolyte materials on the surface of the silicon nitride and in the groove type SiN structure, and preparing a groove type active electrode, wherein the groove type active electrode covers the electrolyte materials. And (3) etching the groove type active electrode and the electrolyte material by adopting an IBE process, stopping the etching until the inert electrode is reached, preparing the electrolyte material by adopting an ALD (atomic layer deposition) or PVD (physical vapor deposition) process to obtain an active electrode test end, limiting the electrolyte size of the ReRAM device by adopting a barrier layer SiN, and exposing the inert electrode material by adopting the IBE process to obtain the inert electrode test end. The invention has the advantages of simple device structure, compatibility with CMOS technology, high consistency, good durability and the like.

Inventors

  • Wei Diedan
  • SUI ZHIYUAN
  • LI YUQI
  • TENG HAORAN
  • ZHOU YING
  • XIAO ZHIQIANG
  • LIU GUOZHU
  • WEI JINGHE
  • WEI YINGQIANG
  • ZHAO WEI
  • YANG HAN
  • SUN YI
  • LIU ZHICHAO

Assignees

  • 中国电子科技集团公司第五十八研究所

Dates

Publication Date
20260505
Application Date
20260209

Claims (7)

  1. 1. The process integration method of the trench memristor device is characterized by comprising the following steps of: providing a silicon substrate, and preparing an inert electrode on the surface of the silicon substrate; Depositing a layer of silicon nitride on the surface of the inert electrode; Photoetching and etching the silicon nitride to form a groove type SiN structure, and over-etching until the silicon nitride reaches an inert electrode; preparing electrolyte materials on the surface of silicon nitride and in the groove type SiN structure; Preparing a groove-type active electrode, wherein the groove-type active electrode is covered with an electrolyte material; And (3) etching the groove type active electrode and the electrolyte material by adopting an IBE process, and performing over etching, stopping to the inert electrode, thereby completing the preparation of the novel memristor.
  2. 2. The process integration method of the trench memristor device of claim 1, wherein the silicon substrate is n-type or p-type, and the silicon substrate is respectively subjected to ultrasonic cleaning in acetone and isopropanol and is cleaned by deionized water before an inert electrode is prepared on the surface of the silicon substrate.
  3. 3. The process integration method of the trench type memristor device according to claim 1, wherein the inert electrode is prepared by adopting a thermal evaporation or PVD process, the material of the inert electrode comprises TiN, W and Ta, the thermal evaporation temperature is 100-300 ℃, the PVD power is 50-500W, and the thickness is 100-1000 nm.
  4. 4. The process integration method of the trench type memristor device of claim 1, wherein the inert electrode is prepared by PECVD, the thickness is 10-200 nm, and the deposition temperature is 150-350 ℃.
  5. 5. The process integration method of the trench type memristor device of claim 1, wherein the trench type SiN structure has a width of 5-1500 nm.
  6. 6. The process integration method of the trench type memristor device according to claim 1, wherein the electrolyte material is a trench type oxide or a chalcogenide, and is prepared by an ALD or PVD process, wherein the ALD process temperature is 80-300 ℃, the PVD process temperature is 25-300 ℃, and the thickness of the electrolyte material is 3-100 nm.
  7. 7. The process integration method of the trench type memristor device according to claim 1, wherein the trench type active electrode is prepared by adopting a thermal evaporation or PVD process, the material comprises Cu, cu-Ag or Cu-Ti, the thermal evaporation temperature is 100-300 ℃, the PVD sputtering power is 50-500 w, the PVD process temperature is 25-300 ℃, and the thickness is 100-1000 nm.

Description

Process integration method of trench memristor Technical Field The invention relates to the technical field of microelectronic integrated circuits, in particular to a process integration method of a trench memristor. Background In order to break through the bottleneck of traditional storage in speed, power consumption and integration level, the novel random access memory device takes nonvolatile as a core advantage, covers main stream types such as a magnetic memory device (MRAM), a phase change memory device (PCRAM), a ferroelectric memory device (FeRAM), a resistance change memory device (ReRAM) and the like, and is gradually paid attention to the fields of high-performance computing and low-power hardware research and development. Compared with a ReRAM, the MRAM has the problems of low switch ratio, easy overlapping of magnetic fields of adjacent memory cells and the like, the PCRAM has the problems of stripping of phase change materials and electrodes caused by repeated phase change, error phase change of the adjacent cells caused by heat diffusion generated by high-temperature phase change and the like, and the FeRAM has the problems of larger memory cell size, easy fatigue failure caused by frequent polarization inversion and the like. The ReRAM memory device has the advantages of high read-write speed (ns level), high durability (up to 101 5 times), low power consumption and structural design optimization, and is one of core means for realizing accurate regulation and control of the electrical performance of the ReRAM. At present, through diversified structure optimization strategies such as electrolyte layer material optimization, multi-electrolyte layer combination, electrolyte size limitation and the like, the growth path and range of the conductive wire can be effectively limited, and the consistency of devices is greatly improved, but device structures and material systems developed in laboratories are difficult to directly industrialize, so that a ReRAM circuit is still limited by production line materials and structures. Disclosure of Invention The invention aims to provide a process integration method of a trench type memristor device, which aims to solve the problems in the background technology. In order to solve the technical problems, the invention provides a process integration method of a trench memristor, which comprises the following steps: providing a silicon substrate, and preparing an inert electrode on the surface of the silicon substrate; Depositing a layer of silicon nitride on the surface of the inert electrode; Photoetching and etching the silicon nitride to form a groove type SiN structure, and over-etching until the silicon nitride reaches an inert electrode; preparing electrolyte materials on the surface of silicon nitride and in the groove type SiN structure; Preparing a groove-type active electrode, wherein the groove-type active electrode is covered with an electrolyte material; And (3) etching the groove type active electrode and the electrolyte material by adopting an IBE process, and performing over etching, stopping to the inert electrode, thereby completing the preparation of the novel memristor. In one embodiment, the silicon substrate is n-type or p-type, and is subjected to ultrasonic cleaning in acetone and isopropanol respectively and deionized water before inert electrodes are prepared on the surface of the silicon substrate. In one embodiment, the inert electrode is prepared by adopting a thermal evaporation or PVD process, the material of the inert electrode comprises TiN, W and Ta, the thermal evaporation temperature is 100-300 ℃, the PVD power is 50-500W, and the thickness is 100-1000 nm. In one embodiment, the inert electrode is prepared by PECVD, the thickness is 10-200 nm, and the deposition temperature is 150-350 ℃. In one embodiment, the trench type SiN structure has a width of 5-1500 nm. In one embodiment, the electrolyte material is a trench oxide or a sulfur compound, and is prepared by an ALD (atomic layer deposition) or PVD (physical vapor deposition) process, wherein the ALD process temperature is 80-300 ℃, the PVD process temperature is 25-300 ℃, and the thickness of the electrolyte material is 3-100 nm. In one embodiment, the trench type active electrode is prepared by adopting a thermal evaporation or PVD process, the material of the trench type active electrode comprises Cu, cu-Ag or Cu-Ti, the thermal evaporation temperature is 100-300 ℃, the PVD sputtering power is 50-500W, the PVD process temperature is 25-300 ℃, and the thickness is 100-1000 nm. According to the process integration method of the trench type memristor device, an ALD (atomic layer deposition) or PVD (physical vapor deposition) process is adopted for preparing the electrolyte material to obtain an active electrode test end, the electrolyte size of the ReRAM device is limited by a barrier layer SiN, and the inert electrode material is exposed to obtain the inert electrode te