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CN-121985738-A - Semiconductor device and method for manufacturing the same

CN121985738ACN 121985738 ACN121985738 ACN 121985738ACN-121985738-A

Abstract

The present disclosure provides a semiconductor device and a method of manufacturing the same. The preparation method comprises the steps of arranging a plurality of deposition units side by side in a reaction cavity of low-pressure chemical vapor deposition equipment, wherein each deposition unit comprises a plurality of substrates, one part of the plurality of substrates is a wafer, the other part of the plurality of substrates is a cosheet, the wafer is used for manufacturing a transistor, the distance between two adjacent substrates in the adjacent deposition units is larger than the distance between two adjacent substrates in the same deposition unit, and a functional film layer is deposited on the wafer in a low-pressure chemical vapor deposition mode. The thickness uniformity of the functional film layer among the wafers can be improved.

Inventors

  • FANG YAN
  • SUN JIAN
  • GU HAO

Assignees

  • 京东方华灿光电(浙江)有限公司

Dates

Publication Date
20260505
Application Date
20251208

Claims (10)

  1. 1. A method of manufacturing a semiconductor device, the method comprising: Arranging a plurality of deposition units side by side in a reaction cavity of low-pressure chemical vapor deposition equipment, wherein each deposition unit comprises a plurality of substrates, one part of the substrates is a wafer, and the other part is a cosheet; And depositing a functional film layer on the wafer by adopting a low-pressure chemical vapor deposition mode.
  2. 2. The method according to claim 1, wherein two deposition units located on both sides of the plurality of deposition units are a first deposition unit and a second deposition unit, respectively, the substrates on the outermost sides of the first deposition unit and the second deposition unit are both the co-sheets, the outermost side of the first deposition unit is a side away from the second deposition unit, and the outermost side of the second deposition unit is a side away from the first deposition unit.
  3. 3. The method of claim 2, wherein at least 1 of said co-chips are included between any adjacent 2 of said wafers in each of said deposition units.
  4. 4. The method of claim 2, wherein each of the deposition units is located in a quartz boat, and the number of the substrates in each of the deposition units is equal to the number of the placement bits of the quartz boat.
  5. 5. The method according to any one of claims 1 to 4, wherein the wafer includes a channel layer and a barrier layer stacked in this order, and the functional film layer is a protective layer on the barrier layer.
  6. 6. The method according to claim 5, wherein the time for depositing the protective layer is 6000 seconds to 8000 seconds, and the thickness of the protective layer is 250nm to 350nm.
  7. 7. The method according to any one of claims 1 to 4, wherein a thickness variation rate of the functional film layer between the respective wafers is 0.3% -1.1%.
  8. 8. The production method according to any one of claims 1 to 4, characterized in that the production method further comprises: placing the wafer into metal organic chemical vapor deposition equipment; Manufacturing a nucleation layer on the wafer; Manufacturing a diffusion barrier layer on the nucleation layer; And manufacturing a passivation layer on the diffusion barrier layer.
  9. 9. The method according to any one of claims 1 to 4, wherein the thickness of the nucleation layer is 50 to 60nm, the thickness of the diffusion barrier layer is 1 to 5nm, and the thickness of the passivation layer is 3 to 6nm.
  10. 10. A semiconductor device manufactured by the manufacturing method according to any one of claims 1 to 9.

Description

Semiconductor device and method for manufacturing the same Technical Field The present disclosure relates to the field of semiconductor technologies, and in particular, to a semiconductor device and a method for manufacturing the same. Background Silicon-based gallium nitride is widely used in the semiconductor field, such as transistors. The related art provides a method for manufacturing a transistor, which comprises the steps of dividing a plurality of wafers and a plurality of silicon wafers into a plurality of deposition units, dividing the wafers into one deposition unit or dividing the silicon wafers into one deposition unit, and depositing a protective layer. The thickness of the deposited protective layer is uneven, so that in the subsequent wafer etching process, the etching end points are inconsistent, and the problem of over etching occurs. The ohmic contact resistance of the transistor is uneven, and the transistor is seriously heated due to the fact that the ohmic contact resistance is large in a high-frequency application scene, so that the reliability of the transistor is low. Disclosure of Invention The embodiment of the disclosure provides a semiconductor device and a preparation method thereof, which can obviously reduce the problem of uneven ohmic contact resistance of the semiconductor device, thereby improving the reliability of the semiconductor device. The technical scheme is as follows: In one aspect, a method for manufacturing a semiconductor device is provided, the method comprising: Arranging a plurality of deposition units side by side in a reaction cavity of low-pressure chemical vapor deposition equipment, wherein each deposition unit comprises a plurality of substrates, one part of the substrates is a wafer, and the other part is a cosheet; And depositing a functional film layer on the wafer by adopting a low-pressure chemical vapor deposition mode. Optionally, the two deposition units located at two sides of the plurality of deposition units are a first deposition unit and a second deposition unit respectively, the outermost substrates of the first deposition unit and the second deposition unit are both the accompanying sheets, the outermost side of the first deposition unit is a side far away from the second deposition unit, and the outermost side of the second deposition unit is a side far away from the first deposition unit. Optionally, at least 1 said co-chip is included between any adjacent 2 of said wafers in each of said deposition units. Optionally, each deposition unit is located in a quartz boat, and the number of the substrates in each deposition unit is equal to the number of the placement bits of the quartz boat. Optionally, the wafer includes a channel layer and a barrier layer stacked in sequence, and the functional film layer is a protective layer located on the barrier layer. Optionally, the deposition time of the protective layer is 6000 seconds to 8000 seconds, and the thickness of the protective layer is 250nm to 350nm. Optionally, the thickness change rate of the functional film layer between the wafers is 0.3% -1.1%. Optionally, the preparation method further comprises: placing the wafer into metal organic chemical vapor deposition equipment; Manufacturing a nucleation layer on the wafer; Manufacturing a diffusion barrier layer on the nucleation layer; And manufacturing a passivation layer on the diffusion barrier layer. Optionally, the thickness of the nucleation layer is 50-60 nm, the thickness of the diffusion barrier layer is 1-5 nm, and the thickness of the passivation layer is 3-6 nm. In another aspect, a semiconductor device is provided, which is fabricated using the fabrication method described above. The technical scheme provided by the embodiment of the disclosure has the beneficial effects that: In the embodiment of the disclosure, each deposition unit comprises a wafer and a cosheet, the wafers and cosheets in each deposition unit are alternately placed, and the thermal conductivity of each deposition unit is similar, so that the temperature difference between each deposition unit is smaller, the gas field is relatively stable during the deposition of the functional film layer, the deposition gas can be uniformly distributed, the reaction is fully carried out on the surface of the wafer, and the thickness difference of the deposited functional film layer is reduced. Drawings In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings required for the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present disclosure, and other drawings may be obtained according to these drawings without inventive effort for a person of ordinary skill in the art. Fig. 1 is a flowchart of a method for manufacturing a semiconductor device according to an embodiment of the present disclosure