Search

CN-121985739-A - Preparation method of germanium-silicon epitaxial silicon cap layer and stacking structure

CN121985739ACN 121985739 ACN121985739 ACN 121985739ACN-121985739-A

Abstract

The invention provides a preparation method of a germanium-silicon epitaxial silicon cap layer and a stacking structure, which comprises the following steps of S1 providing a substrate, forming a groove on the substrate, growing a germanium-silicon layer in the groove, S2 forming a first silicon layer on the germanium-silicon layer by taking SiH 2 Cl 2 as a silicon source through a pulse atomic layer deposition process, wherein the thickness of the first silicon layer is not more than 5nm, S3 forming a second silicon layer on the first silicon layer by taking SiH 4 as a silicon source through a pulse atomic layer deposition process, wherein the thickness of the second silicon layer is not more than 5nm, S4 repeating the steps S2 and S3 to a preset number of times, and then carrying out H 2 plasma annealing treatment on the substrate, and S5 repeating the steps S2, S3 and S4 until the sum of the thicknesses of all the first silicon layer and the second silicon layer reaches a target thickness to form the silicon cap layer. The high conformality, high-speed growth and structural stability of the silicon cap layer are unified by DCS and SiH 4 alternate pulse atomic layer deposition (the thickness of a single deposition layer is smaller than 5 nm) and the H 2 plasma annealing cycle process repeated for a preset number of times.

Inventors

  • LIANG HUAN

Assignees

  • 重庆芯联微电子有限公司

Dates

Publication Date
20260505
Application Date
20251224

Claims (10)

  1. 1. The preparation method of the germanium-silicon epitaxial silicon cap layer is characterized by comprising the following steps of: S1, providing a substrate, wherein a groove is formed on the substrate, and a germanium-silicon layer grows in the groove; S2, siH 2 Cl 2 is used as a silicon source, a first silicon layer is formed on the germanium-silicon layer through a pulse atomic layer deposition process, and the thickness of the first silicon layer is not more than 5nm; s3, siH 4 is used as a silicon source, a second silicon layer is formed on the first silicon layer through a pulse atomic layer deposition process, and the thickness of the second silicon layer is not more than 5nm; S4, repeating the steps S2 and S3 to a preset number of times, and then carrying out H 2 plasma annealing treatment on the substrate; S5, repeating the steps S2, S3 and S4 until the sum of the thicknesses of all the first silicon layers and the second silicon layers reaches the target thickness, and forming the silicon cap layer.
  2. 2. The method of claim 1, wherein in step S2, the parameters of the pulsed atomic layer deposition process are SiH 2 Cl 2 flow rate 20-30sccm, pulse duration 1-5S.
  3. 3. The method of claim 1, wherein in step S3, the pulsed atomic layer deposition process has a parameters of SiH 4 flow rate of 20-30sccm and a pulse duration of 0.5-3S.
  4. 4. The method of claim 3, further comprising dissociating B 2 H 6 into boron radicals and doping the boron radicals into the second silicon layer by a remote plasma process using B 2 H 6 as a boron source in step S3, wherein the ratio of the B 2 H 6 flow rate to the SiH 2 Cl 2 flow rate is 1-1.5:1.
  5. 5. The method according to claim 1, wherein the predetermined number of times is 3-5 times in step S4, and the target thickness is 30-70 nm in step S5.
  6. 6. The preparation method of the germanium-silicon epitaxial stacked structure is characterized by comprising the following steps of: (1) Providing a substrate, and forming a groove in the substrate; (2) Sequentially depositing an L1 buffer layer, an L2 seed crystal layer and an L3 seed crystal layer in the groove; (3) Preparing the silicon cap layer on the L3 seed layer by the method of any one of claims 1-5 to obtain a germanium-silicon epitaxial stacked structure.
  7. 7. The method of claim 6, wherein after step (1), the recess is sequentially subjected to dry etching and H 2 baking, and the recess is shaped as a sigma-shaped, a U-shaped or an irregular concave shape.
  8. 8. The method of claim 6, wherein in step (2), the L1 buffer layer is a boron doped silicon germanium layer, and the L1 buffer layer has a thickness of 100-300A; In the L1 buffer layer, the germanium content is 10-30 at%, and the boron doping concentration is 1E 18-1E 20 atoms/cm 3 .
  9. 9. The method of claim 6, wherein in step (2), the L2 seed layer comprises a L2' sub-layer and a L2 "sub-layer deposited sequentially: The L2 'sub-layer is a boron doped germanium-silicon layer with the thickness of 200A-400A, the germanium content in the L2' sub-layer is 30-50 at%, the boron doping concentration is 1E 20-9E 20 atoms/cm 3 , and the height is less than or equal to the horizontal plane of the grid structure; The L2 'sub-layer is a boron doped germanium-silicon layer with the thickness of 100A to 200A, the germanium content in the L2' sub-layer is 20 to 50at percent, and the boron doping concentration is 1E19 to 9E20 atoms/cm 3 .
  10. 10. The method of claim 6, wherein in step (2) the L3 seed layer is a boron doped silicon layer having a thickness of 80-300A, and wherein in the L3 seed layer the boron doping concentration is 1E 20-6E 20 atoms/cm 3 .

Description

Preparation method of germanium-silicon epitaxial silicon cap layer and stacking structure Technical Field The invention relates to the technical field of semiconductor device manufacturing, in particular to a preparation method of a germanium-silicon epitaxial silicon cap layer and a stacked structure. Background In the manufacture of semiconductor devices, a silicon cap layer is a key functional layer of a germanium-silicon epitaxial stacked structure, and common silicon sources for epitaxial growth are dichlorosilane (DCS, i.e. SiH 2Cl2) and silane (SiH 4), but in practical application, the two silicon sources have technical bottlenecks which are difficult to overcome: Firstly, when DCS is adopted as a silicon source, better conformality (namely even coverage of the silicon cap layer in a groove structure) can be realized, but the growth rate is lower, and is difficult to match the efficiency requirement of semiconductor mass production, and when SiH 4 is adopted as the silicon source, the growth rate is obviously improved, but nonconformal phenomena are easily caused in an SRAM region (as shown in a silicon cap HAADF image of different silicon sources in FIG. 4, (a) is a silicon cap corresponding to SiH 4 silicon source, b) is a silicon cap corresponding to DCS silicon source, and the silicon cap of SiH 4 silicon source has obvious uneven morphology), so that the consistency of a device structure cannot be ensured. Secondly, the doping induced amorphization defect exists, namely, in order to reduce the resistivity of the silicon cap layer and optimize the conductivity of the source and drain of the device, the prior art generally increases the injection flow of a boron source (B 2H6), but when the boron flow reaches more than 0.75 times of DCS flow, the amorphization of the silicon cap layer is initiated (as shown in a TEM image of the silicon cap under different boron flows in FIG. 5, (B) the corresponding boron flow is 0.15 times of DCS flow, (c) the corresponding boron flow is 0.75 times of DCS flow, and the silicon cap presents an amorphous structure under high boron flow), so that the single crystal property of the silicon cap layer is damaged, and the electrical property of the device is further deteriorated. In addition, the problem of high temperature residue is prominent in that if the epitaxial temperature is higher than the process reference temperature T 0 +90 ℃, a silicon phase (such as a residual HAADF image of Si at T0+90 ℃ as shown in FIG. 6) remains on the silicon nitride (Si 3N4) layer, and the residual silicon phase easily causes open circuit of device contact, thereby greatly reducing the product yield. In summary, in the existing silicon cap epitaxy technology, DCS and SiH 4 silicon sources have short plates, which cannot simultaneously satisfy the core requirements of high conformality, high-rate growth, no doped amorphization, low residual defects, and the like. Disclosure of Invention In order to solve all or part of the problems in the prior art, the invention provides a preparation method of a germanium-silicon epitaxial silicon cap layer and a stacked structure, which realizes the unification of high conformality, high-speed growth and structural stability of the silicon cap layer by DCS and SiH 4 alternate pulse atomic layer deposition (the thickness of a single deposition layer is smaller than 5 nm) and matching with an H 2 plasma annealing circulation process after repeated for a preset number of times. In order to achieve the above purpose, the present invention provides the following technical solutions: a preparation method of a germanium-silicon epitaxial silicon cap layer comprises the following steps: S1, providing a substrate, wherein a groove is formed on the substrate, and a germanium-silicon layer grows in the groove; S2, siH 2Cl2 is used as a silicon source, a first silicon layer is formed on the germanium-silicon layer through a pulse atomic layer deposition process, and the thickness of the first silicon layer is not more than 5nm; s3, siH 4 is used as a silicon source, a second silicon layer is formed on the first silicon layer through a pulse atomic layer deposition process, and the thickness of the second silicon layer is not more than 5nm; S4, repeating the steps S2 and S3 to a preset number of times, and then carrying out H 2 plasma annealing treatment on the substrate; S5, repeating the steps S2, S3 and S4 until the sum of the thicknesses of all the first silicon layers and the second silicon layers reaches the target thickness, and forming the silicon cap layer. In the step S2, parameters of the pulse atomic layer deposition process are that SiH 2Cl2 flow is 20-30sccm, and pulse duration is 1-5S. In the step S3, parameters of the pulse atomic layer deposition process are that SiH 4 flow is 20-30sccm, and pulse duration is 0.5-3S. In the step S3, B 2H6 is used as a boron source, B 2H6 is dissociated into boron free radicals through a remote plasma process