CN-121985794-A - Method for manufacturing semiconductor structure

Abstract

The invention provides a manufacturing method of a semiconductor structure, which comprises the following steps. A target layer is formed on a substrate. And forming a hard mask layer on the target layer. And removing part of the hard mask layer to form a groove in the hard mask layer. Forming a plurality of first patterns on the top surface of the hard mask layer and simultaneously forming a plurality of second patterns in the grooves, wherein the pattern density of the plurality of first patterns is smaller than that of the plurality of second patterns. The hard mask layer and the target layer are patterned using the plurality of first patterns and the plurality of second patterns as masks to form a plurality of first target patterns corresponding to the plurality of first patterns and a plurality of second target patterns corresponding to the plurality of second patterns in the target layer. The plurality of first patterns, the plurality of second patterns, and the hard mask layer are removed.

Inventors

• PENG RONGCI

Assignees

• 南亚科技股份有限公司

Dates

Publication Date

20260505

Application Date

20241203

Priority Date

20241029

Claims (10)

1. 1. A method of fabricating a semiconductor structure, comprising: Forming a target layer on a substrate; Forming a hard mask layer on the target layer; removing a portion of the hard mask layer to form a recess in the hard mask layer; Forming a plurality of first patterns on the top surface of the hard mask layer and simultaneously forming a plurality of second patterns in the grooves, wherein the pattern density of the plurality of first patterns is smaller than that of the plurality of second patterns; Patterning the hard mask layer and the target layer using the plurality of first patterns and the plurality of second patterns as masks to form a plurality of first target patterns corresponding to the plurality of first patterns and a plurality of second target patterns corresponding to the plurality of second patterns in the target layer, and The plurality of first patterns, the plurality of second patterns, and the hard mask layer are removed.
2. 2. The method of manufacturing a semiconductor structure according to claim 1, wherein a width between a boundary of the recess and an outermost second pattern of the plurality of second patterns is 0.1 μm to 5 μm.
3. 3. The method of manufacturing a semiconductor structure of claim 1, wherein the method of forming the recess comprises: providing a first photomask having an opening, wherein the opening corresponds to the location of the recess; Forming a first photoresist layer on the hard mask layer; Performing a first exposure and development process on the first photoresist layer using the first photomask to form a patterned photoresist layer; performing an anisotropic etching process on the hard mask layer using the patterned photoresist layer as an etching mask, and And removing the patterned photoresist layer.
4. 4. The method of claim 3, wherein the first photoresist layer has a thickness of 50nm to 200nm.
5. 5. The method of claim 3, wherein the first plurality of patterns and the second plurality of patterns are photoresist patterns.
6. 6. The method of manufacturing a semiconductor structure according to claim 5, wherein the forming the plurality of first patterns and the plurality of second patterns comprises: Providing a second photomask comprising a first region and a second region, wherein a plurality of first photomask patterns corresponding to the plurality of first patterns are located in the first region, and a plurality of second photomask patterns corresponding to the plurality of second patterns are located in the second region; Forming a second photoresist layer on the hard mask layer, and And performing a second exposure and development process on the second photoresist layer by using the second photomask.
7. 7. The method of manufacturing a semiconductor structure according to claim 6, wherein a wavelength used for exposing the first photoresist layer is greater than a wavelength used for exposing the second photoresist layer.
8. 8. The method of claim 1, wherein the first pattern comprises a hole pattern or a line pattern.
9. 9. The method of claim 1, wherein the second pattern comprises a hole pattern or a line pattern.
10. 10. The method of manufacturing a semiconductor structure of claim 1, wherein a top surface of the first target pattern is coplanar with a top surface of the second target pattern.

Description

Method for manufacturing semiconductor structure Technical Field The present invention relates to a semiconductor process, and more particularly, to a method of manufacturing a semiconductor structure including a first target pattern having a smaller pattern density and a second target pattern having a larger pattern density. Background In a semiconductor process, a patterning process is used to transfer a target pattern into a target layer on a substrate. The patterning process may include forming a patterned mask layer having a pattern corresponding to a target pattern on a target layer, performing an anisotropic etching process on the target layer using the patterned mask layer as an etching mask, and removing the patterned mask layer. For a target pattern including a first target pattern having a smaller pattern density and a second target pattern having a larger pattern density, the etch rate in a first region where the first target pattern is formed may be greater than the etch rate in a second region where the second target pattern is formed during the anisotropic etching process. Thus, after forming the target pattern in the target layer, overetching (over-etching) may occur in the first region, causing damage to the substrate or causing the first target pattern to collapse or fail. On the other hand, in order to avoid overetching in the first region, the etching time is reduced such that the second target pattern cannot be formed in the second region due to underetching (etching). Disclosure of Invention The present invention is directed to a method of manufacturing a semiconductor structure including a first target pattern having a smaller pattern density and a second target pattern having a larger pattern density, wherein a hard mask layer formed on the target layer is subjected to a patterning process twice. The manufacturing method of the semiconductor structure comprises the following steps. A target layer is formed on a substrate. And forming a hard mask layer on the target layer. And removing part of the hard mask layer to form a groove in the hard mask layer. Forming a plurality of first patterns on the top surface of the hard mask layer and simultaneously forming a plurality of second patterns in the grooves, wherein the pattern density of the plurality of first patterns is smaller than that of the plurality of second patterns. The hard mask layer and the target layer are patterned using the plurality of first patterns and the plurality of second patterns as masks to form a plurality of first target patterns corresponding to the plurality of first patterns and a plurality of second target patterns corresponding to the plurality of second patterns in the target layer. The plurality of first patterns, the plurality of second patterns, and the hard mask layer are removed. In an embodiment of the method for manufacturing a semiconductor structure of the present invention, a width between a boundary of the recess and an outermost second pattern of the plurality of second patterns is 0.1 μm to 5 μm. In one embodiment of the method for manufacturing a semiconductor structure of the present invention, the method for forming the recess includes the following steps. A first photomask is provided having an opening, wherein the opening corresponds to a location of the recess. And forming a first photoresist layer on the hard mask layer. And performing a first exposure and development process on the first photoresist layer by using the first photomask to form a patterned photoresist layer. And using the patterned photoresist layer as an etching mask, performing an anisotropic etching process on the hard mask layer. And removing the patterned photoresist layer. In an embodiment of the method for manufacturing a semiconductor structure of the present invention, a thickness of the first photoresist layer is 50nm to 200nm. In an embodiment of the method for manufacturing a semiconductor structure of the present invention, the plurality of first patterns and the plurality of second patterns are photoresist patterns. In an embodiment of the method for manufacturing a semiconductor structure of the present invention, the method for forming the plurality of first patterns and the plurality of second patterns includes the following steps. A second photomask is provided that includes a first region and a second region, wherein a plurality of first photomask patterns corresponding to the plurality of first patterns are located in the first region and a plurality of second photomask patterns corresponding to the plurality of second patterns are located in the second region. And forming a second photoresist layer on the hard mask layer. And performing a second exposure and development process on the second photoresist layer by using the second photomask. In an embodiment of the method for manufacturing a semiconductor structure of the present invention, a wavelength used for exposing the first photoresist layer is