CN-121985799-A - Method for manufacturing semiconductor structure

Abstract

The present invention provides a method of fabricating a semiconductor structure, the method comprising the following operations. A substrate is received having an array region and a peripheral region, wherein the thickness of the array region is greater than the thickness of the peripheral region. Trenches are formed in an array region of a substrate. A first dielectric layer is formed over the array region and in the trench of the substrate. A first conductive layer is formed over the first dielectric layer and in the trench. A second dielectric layer is formed over the first conductive layer and the peripheral region of the substrate. A portion of the second dielectric layer is etched to expose the first conductive layer. A second conductive layer is formed on the second dielectric layer in contact with the first conductive layer. The invention improves the stress resistance of the semiconductor structure.

Inventors

• HUANG SHITING
• HONG SHIMIN

Assignees

• 南亚科技股份有限公司

Dates

Publication Date

20260505

Application Date

20260209

Priority Date

20251023

Claims (20)

1. 1. A method of fabricating a semiconductor structure, comprising: Receiving a substrate having an array region and a peripheral region, wherein the thickness of the array region is greater than the thickness of the peripheral region; Forming a trench in the array region of the substrate; Forming a first dielectric layer on the array region of the substrate and in the trench; forming a first conductive layer on the first dielectric layer and in the trench; forming a second dielectric layer on the first conductive layer and the peripheral region of the substrate; etching a portion of the second dielectric layer to expose the first conductive layer, and A second conductive layer is formed in contact with the first conductive layer and over the second dielectric layer.
2. 2. The method of claim 1, further comprising: Shallow trench isolation structures are formed on the second conductive layer and over the peripheral region of the substrate.
3. 3. The method of claim 2, wherein forming the shallow trench isolation structure on the second conductive layer and over the peripheral region comprises: Coating an insulating material solution on the second conductive layer to form an insulating material film; Curing the insulating material film to form an insulating layer Planarizing the insulating layer to form the shallow trench isolation structure.
4. 4. A method according to claim 3, wherein coating the insulating material solution on the second conductive layer is performed by a spin coating process.
5. 5. A method according to claim 3, wherein curing the insulating material film is performed at 150 ℃ to 1300 ℃.
6. 6. A method according to claim 3, wherein curing the insulating material film is performed in a water vapor environment.
7. 7. The method of claim 1, wherein the array region of the substrate has a sidewall adjacent to the peripheral region of the substrate, and the second dielectric layer covers the sidewall.
8. 8. The method of claim 1, wherein the second dielectric layer is in contact with an end portion of the first conductive layer.
9. 9. The method of claim 1, wherein the second dielectric layer is in contact with an end portion of the first dielectric layer.
10. 10. The method of claim 1, wherein the second conductive layer extends from a top surface of the first conductive layer to a top surface of the second dielectric layer.
11. 11. The method of claim 1, wherein forming the first dielectric layer in the trench of the substrate comprises conformally forming the first dielectric layer in the trench to cover an inner surface of the trench of the substrate.
12. 12. A method of fabricating a semiconductor structure, comprising: Receiving a substrate having a first portion and a second portion, wherein the first portion is thicker than the second portion; forming a trench in the first portion of the substrate, and Forming a first dielectric layer to cover the first portion of the substrate and the inner surface of the trench; forming a first conductive layer on the first dielectric layer and in the trench; forming a second dielectric layer to cover the sidewall of the first portion of the substrate and the second portion of the substrate; forming a second conductive layer contacting the first conductive layer and on the second dielectric layer, and A spin-on dielectric layer is formed on the second conductive layer.
13. 13. The method of claim 12, wherein forming the first dielectric layer to cover the inner surface of the trench comprises conformally forming the first dielectric layer in the trench to cover the inner surface of the trench.
14. 14. The method of claim 12, further comprising: after forming the spin-on dielectric layer on the second conductive layer, curing the spin-on dielectric layer to form a third dielectric layer, and Planarizing the third dielectric layer.
15. 15. The method of claim 14, wherein curing the spin-on dielectric layer is performed at a temperature of 150 ℃ to 1300 ℃.
16. 16. The method of claim 14, wherein curing the spin-on dielectric layer is performed in a water vapor environment.
17. 17. The method of claim 16, wherein the pressure of the water vapor environment is 500 torr to 900 torr.
18. 18. The method of claim 12, wherein forming the second dielectric layer to cover the sidewall of the first portion of the substrate and the second portion of the substrate comprises: Depositing the second dielectric layer on the first conductive layer, the sidewall of the first portion of the substrate and the second portion of the substrate, and The second dielectric layer is etched on the first conductive layer.
19. 19. The method of claim 12, wherein the second conductive layer extends from a top surface of the first conductive layer to a top surface of the second dielectric layer.
20. 20. The method of claim 12, wherein the second dielectric layer is in contact with an end portion of the first conductive layer and an end portion of the first dielectric layer.

Description

Method for manufacturing semiconductor structure Technical Field The present invention relates to a method of fabricating a semiconductor structure. Background Semiconductor structures are widely used in a variety of electronic devices, such as cell phones, computers, electric vehicles, digital cameras, or other electronic components. As integration increases, the area or size occupied by semiconductor structures needs to be reduced or reduced. However, as the area or size of the semiconductor structure decreases, problems also occur, which in turn affect the quality and yield of the final semiconductor structure. Therefore, how to improve the quality and yield of the final semiconductor structure remains a challenge. Disclosure of Invention The present invention provides a method of fabricating a semiconductor structure, the method comprising the following operations. A substrate having an array region and a peripheral region is received, wherein the thickness of the array region is greater than the thickness of the peripheral region. Trenches are formed in an array region of a substrate. A first dielectric layer is formed over the array region of the substrate and in the trench. A first conductive layer is formed on the first dielectric layer and in the trench. A second dielectric layer is formed on the peripheral region of the first conductive layer and the substrate. Portions of the second dielectric layer are etched to expose the first conductive layer. A second conductive layer is formed in contact with the first conductive layer and over the second dielectric layer. In some embodiments, the method further includes forming a shallow trench isolation structure on the second conductive layer and over the peripheral region of the substrate. In some embodiments, forming the shallow trench isolation structure on the second conductive layer and over the peripheral region includes the following operations. An insulating material solution is coated on the second conductive layer to form an insulating material film. The insulating material film is cured to form an insulating layer. And flattening the insulating layer to form the shallow trench isolation structure. In some embodiments, the coating of the insulating material solution on the second conductive layer is performed by a spin coating process. In some embodiments, curing the insulating material film is performed at 150 ℃ to 1300 ℃. In some embodiments, curing the insulating material film is performed in a water vapor environment. In some embodiments, the array region of the substrate has sidewalls adjacent to a peripheral region of the substrate, and the second dielectric layer covers the sidewalls. In some embodiments, the second dielectric layer is in contact with an end portion of the first conductive layer. In some embodiments, the second dielectric layer is in contact with an end portion of the first dielectric layer. In some embodiments, the second conductive layer extends from a top surface of the first conductive layer to a top surface of the second dielectric layer. In some embodiments, forming the first dielectric layer in the trench of the substrate includes conformally forming the first dielectric layer in the trench to cover an inner surface of the trench of the substrate. The present invention provides a method of fabricating a semiconductor structure, the method comprising the following operations. A substrate having a first portion and a second portion is received, wherein the first portion is thicker than the second portion. A trench is formed in a first portion of the substrate. A first dielectric layer is formed to cover the first portion of the substrate and the inner surface of the trench. A first conductive layer is formed on the first dielectric layer and in the trench. A second dielectric layer is formed to cover sidewalls of the first portion of the substrate and the second portion of the substrate. A second conductive layer is formed in contact with the first conductive layer and over the second dielectric layer. A spin-on dielectric layer is formed on the second conductive layer. In some embodiments, forming the first dielectric layer to cover the inner surface of the trench includes conformally forming the first dielectric layer in the trench to cover the inner surface of the trench. In some embodiments, the method further comprises the following operations. After forming the spin-on dielectric layer on the second conductive layer, the spin-on dielectric layer is cured to form a third dielectric layer. The third dielectric layer is planarized. In some embodiments, curing the spin-on dielectric layer is performed at a temperature of 150 ℃ to 1300 ℃. In some embodiments, curing the spin-on dielectric layer is performed in a water vapor environment. In some embodiments, the pressure of the water vapor environment is 500 torr to 900 torr. In some embodiments, forming the second dielectric layer to cover the sidewalls of the firs