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CN-121985803-A - Silicon adapter plate applied to radio frequency micro system and preparation method thereof

CN121985803ACN 121985803 ACN121985803 ACN 121985803ACN-121985803-A

Abstract

The invention provides a silicon adapter plate applied to a radio frequency micro system and a preparation method thereof, wherein a Damascus wiring process and a PI wiring process are adopted to sequentially form a plurality of Damascus wiring layers and a plurality of organic medium wiring layers on a silicon substrate, so that the silicon adapter plate can realize high-density integration with a TSV blind hole depth-to-width ratio of not less than 10:1 and 8 wiring layers, the thermal stability and the high-frequency performance of the system are obviously improved, and a better process platform support is provided for the radio frequency-digital integrated micro system. The ultra-fine line width of the second interconnection structure in the Damascus wiring layer can effectively solve the bottleneck of high-density signal interconnection and greatly reduce transmission power consumption, the existence of the organic medium wiring layer can overcome the problem of high radio frequency loss of a single Damascus wiring layer, in addition, the adjustment and control on the warpage of the adapter plate can be further realized by adjusting the thickness of the organic medium wiring layer, and the preparation process is simpler, easy to implement and lower in manufacturing cost.

Inventors

  • WU JILONG
  • Min Chengyu
  • HOU XIONGFEI
  • WU FA
  • GAO YANAN
  • LIU WEI

Assignees

  • 联合微电子中心有限责任公司

Dates

Publication Date
20260505
Application Date
20260205

Claims (10)

  1. 1. The preparation method of the silicon adapter plate applied to the radio frequency micro system is characterized by comprising the following steps of: Providing a silicon substrate, wherein the silicon substrate is provided with a front surface and a back surface which are oppositely arranged, and etching the front surface of the silicon substrate to form a plurality of TSV blind holes; sequentially forming an insulating barrier layer and a first seed layer on the side wall and the bottom of the TSV blind hole, filling metal in the TSV blind hole to form a first interconnection structure, and carrying out a planarization process on the first interconnection structure to enable the first interconnection structure to be flush with the front surface of the substrate; forming a Damascus wiring layer on the front surface of the silicon substrate by adopting a Damascus process, wherein the Damascus wiring layer comprises a plurality of inorganic dielectric layers and a second interconnection structure positioned in the inorganic dielectric layers, and the second interconnection structure is electrically connected with the first interconnection structure; Forming an organic medium wiring layer on the Damascus wiring layer by adopting a PI wiring process, wherein the organic medium wiring layer comprises a plurality of layers of organic medium layers and a third interconnection structure positioned in the organic medium layer, and the third interconnection structure is electrically connected with the second interconnection structure; and forming a UBM layer on the third interconnection structure, wherein the UBM layer is electrically connected with the third interconnection structure.
  2. 2. The method of claim 1, wherein the second interconnect structure has a density of 25% -50% and the third interconnect structure has a density of 25% -50%.
  3. 3. The method for preparing the silicon interposer for the radio frequency micro system of claim 1, wherein the aspect ratio of the TSV blind holes is more than or equal to 10:1.
  4. 4. The method of claim 1, wherein the number of inorganic dielectric layers is 1-5, and the line width (S)/line spacing (L) of the second interconnection structure is 0.4 μm/0.4 μm≤S/L≤2 μm/2. Mu.m.
  5. 5. The method for preparing the silicon interposer for the radio frequency micro system as claimed in claim 1, wherein the number of the organic dielectric layers is 1-4, and the thickness of each layer in the organic dielectric layers is equal and is 3-25 μm.
  6. 6. The method of claim 1, wherein the third interconnect structure has a line width of 2-100 μm, a thickness of 2-20 μm, and a line spacing of less than or equal to 100 μm.
  7. 7. The method for manufacturing a silicon interposer for a radio frequency micro system according to claim 1, wherein: the material of the organic dielectric layer is Polyimide (PI) or Polybenzoxazole (PBO).
  8. 8. The method for preparing a silicon interposer for a radio frequency micro system according to claim 1, wherein the method for forming the UBM layer is an electroless plating process, the UBM layer is a NiPdAu layer, the thickness of the Ni layer is 1-5 μm, the thickness of the Pd layer is 0.1-0.5 μm, and the thickness of the Au layer is 0.1-2 μm.
  9. 9. The method for manufacturing a silicon interposer for a radio frequency micro system according to claim 1, wherein the method for forming the UBM layer is an electroplating process, the UBM layer is a Cu/Ni/SnAg layer, the thickness of the Cu layer is 1-5 μm, the thickness of the Ni layer is 0.01-2.5 μm, and the thickness of the SnAg layer is 1-5 μm.
  10. 10. A silicon adapter plate applied to a radio frequency micro system is characterized in that, the silicon interposer applied to the radio frequency micro system is prepared by the preparation method of the silicon interposer applied to the radio frequency micro system as claimed in any one of claims 1 to 9, and comprises the following steps: A silicon substrate having oppositely disposed front and back surfaces, the silicon substrate including a plurality of TSV blind holes therein and a first interconnect structure in the TSV blind holes, the front surface of the silicon substrate exposing a surface of the first interconnect structure; the Damascus wiring layer is positioned on the front surface of the silicon substrate and comprises a plurality of layers of inorganic dielectric layers and a second interconnection structure positioned in the inorganic dielectric layers, and the second interconnection structure is electrically connected with the first interconnection structure; the organic medium wiring layer is positioned on the upper surface of the Damascus wiring layer, and comprises a plurality of layers of organic medium layers and a third interconnection structure positioned in the organic medium layer, and the third interconnection structure is electrically connected with the second interconnection structure; and the UBM layer is positioned on the upper surface of the third interconnection structure and is electrically connected with the third interconnection structure.

Description

Silicon adapter plate applied to radio frequency micro system and preparation method thereof Technical Field The invention belongs to the technical field of microelectronic packaging, and relates to a silicon adapter plate applied to a radio frequency micro system and a preparation method thereof. Background Aiming at the urgent demands of miniaturization, high integration and multifunction of the radio frequency front end in the fields of radar, electronic warfare equipment systems, 5G communication and the like, the integration of the radio frequency microsystem can realize the high integration of the functional module on the micro-nano scale, so that the integration becomes a key direction of the development of a modern electronic information system. At present, the radio frequency microsystem integration mainly adopts a Damascus wiring process or an organic dielectric layer wiring process to prepare a plurality of wiring layers on an adapter plate, wherein the Damascus wiring process realizes multi-layer interconnection through copper filled grooves and through holes, has the advantages of high density and low resistance, but faces the challenges of depth-to-width ratio limitation, high process complexity and insufficient thermal stability, the organic dielectric layer wiring adopts photosensitive materials such as Polyimide (PI) and the like, has the characteristics of low dielectric constant and low loss, but has the limitation on high frequency performance and integration density, and with the development of a more complex radio frequency-digital integrated microsystem, the single Damascus wiring process or the organic dielectric layer wiring process cannot meet the requirements of high-density integration, interference resistance, large bandwidth and low power consumption of the radio frequency microsystem. In addition, when the Damascus wiring process and the organic medium layer wiring process are subjected to heterogeneous integration, the high-density integration cannot be performed due to the fact that the depth-to-width ratio of the traditional TSV (through silicon via) process is limited, the number of wiring layers of a single process is generally 4-6, the requirement of a more complex radio frequency-digital integrated micro system cannot be supported, the existing patch panel process production line is only suitable for a front end of semiconductor process (FEOL) or a back end of semiconductor packaging process (BEOL), the capability of a middle-channel process is lost, effective integration of a multifunctional module cannot be achieved, and as the thermal expansion coefficient mismatch is caused by the improvement of integration density, the traditional heat dissipation scheme is difficult to meet the heat dissipation requirement of a high-power radio frequency device, and the reliability and performance of a system are affected. Disclosure of Invention In view of the above drawbacks of the prior art, an object of the present invention is to provide a silicon interposer for a radio frequency micro system and a method for manufacturing the same, which are used for solving the above problems encountered in the prior art when the damascene wiring process and the organic dielectric layer wiring process are heterogeneous integrated. To achieve the above and other related objects, the present invention provides a method for manufacturing a silicon interposer for a radio frequency micro system, comprising the steps of: Providing a silicon substrate, wherein the silicon substrate is provided with a front surface and a back surface which are oppositely arranged, and etching the front surface of the silicon substrate to form a plurality of TSV blind holes; sequentially forming an insulating barrier layer and a first seed layer on the side wall and the bottom of the TSV blind hole, filling metal in the TSV blind hole to form a first interconnection structure, and carrying out a planarization process on the first interconnection structure to enable the first interconnection structure to be flush with the front surface of the substrate; forming a Damascus wiring layer on the front surface of the silicon substrate by adopting a Damascus process, wherein the Damascus wiring layer comprises a plurality of inorganic dielectric layers and a second interconnection structure positioned in the inorganic dielectric layers, and the second interconnection structure is electrically connected with the first interconnection structure; Forming an organic medium wiring layer on the Damascus wiring layer by adopting a PI wiring process, wherein the organic medium wiring layer comprises a plurality of layers of organic medium layers and a third interconnection structure positioned in the organic medium layer, and the third interconnection structure is electrically connected with the second interconnection structure; and forming a UBM layer on the third interconnection structure, wherein the UBM layer is electrically c