CN-121985808-A - Semiconductor structure, preparation method, bonding method and semiconductor device

CN121985808ACN 121985808 ACN121985808 ACN 121985808ACN-121985808-A

Abstract

The application relates to the technical field of semiconductors, and particularly discloses a semiconductor structure, a preparation method, a bonding method and a semiconductor device, wherein the preparation method of the semiconductor structure comprises the steps of providing a semiconductor substrate with a metal interconnection layer; forming a dielectric layer on a semiconductor substrate, etching the dielectric layer to form a groove, conformally forming an air suction layer in the groove, then filling a protective layer, etching the protective layer, the air suction layer and the dielectric layer to form a through hole penetrating from the groove to be connected to a metal interconnection layer, filling a metal material layer in the through hole, and forming a bonding surface after thinning treatment. The gas absorbing layer can absorb gas generated by the condensation reaction of the dielectric layer and the like in the bonding annealing process, the risk of forming a cavity at the bonding interface is reduced, when the alignment of the bonding surface of the wafer has small deviation, the protective layer can block metal atoms from diffusing to the dielectric layer of the opposite wafer, and meanwhile, the gas absorbing layer can buffer stress generated by expansion of the metal column, so that stress damage of the dielectric layer at the bonding interface is avoided.

Inventors

WU DECHAO
HAO XIAOQIANG
LIANG JIAN

Assignees

合肥晶合集成电路股份有限公司

Dates

Publication Date: 20260505
Application Date: 20260408

Claims (13)

1. A preparation method of a semiconductor structure is characterized by comprising the following steps: providing a semiconductor substrate with a metal interconnection layer; forming a dielectric layer on the semiconductor substrate; Etching the dielectric layer to form a groove; firstly conformally depositing an air suction layer on the dielectric layer, and then depositing a protective layer until the grooves are filled; etching the protective layer, the getter layer and the dielectric layer to form a through hole penetrating through the groove and connected to the metal interconnection layer; Filling a metal material layer in the through hole; The thinning treatment is stopped at the top of the groove to form a bonding surface, and the bonding surface comprises a metal column, and a protective layer, an air suction layer and a medium layer which encircle the metal column.
2. The method of manufacturing a semiconductor structure according to claim 1, wherein the gettering layer is a porous structure having plastic deformation capability.
3. The method of manufacturing a semiconductor structure according to claim 2, wherein the gettering layer is one or more of a porous metal layer, a porous alloy layer, and a porous metal oxide layer.
4. The method of manufacturing a semiconductor structure according to claim 3, wherein the gas-absorbing layer has a porosity ranging from 20% to 60%.
5. A method of fabricating a semiconductor structure as defined in claim 1, wherein the protective layer is dense and has a low metal diffusion coefficient.
6. The method of manufacturing a semiconductor structure according to claim 1, wherein the top dimension of the metal pillar is X 1 , the top peripheral dimension of the protective layer is X 2 , and X 1 <X 2 <3X 1 is satisfied after the thinning.
7. The method of manufacturing a semiconductor structure according to claim 1, wherein the recess is formed using the same mask as the photolithography process for forming the via hole, and wherein the photoresist pattern is pulled back during the photolithography process for forming the recess.
8. The method of manufacturing a semiconductor structure according to claim 1, further comprising depositing an anti-diffusion layer in the via prior to filling the metal material layer in the via.
9. A semiconductor structure is characterized by comprising: a semiconductor substrate having a metal interconnection layer therein; A dielectric layer formed on the semiconductor substrate; the metal column is formed in the dielectric layer, and the bottom of the metal column is connected to the metal interconnection layer; The groove surrounds the metal column and is formed on the inner surface of the dielectric layer; a gas absorbing layer conformally formed on the inner surface of the groove, and And the protective layer is used for filling the groove formed with the air suction layer.
10. The semiconductor structure of claim 9, wherein a buffer layer is further disposed between the dielectric layer and the semiconductor substrate.
11. The semiconductor structure of claim 9, wherein the metal pillars are further surrounded by an anti-diffusion layer.
12. A method of bonding semiconductor structures comprising a first semiconductor structure and a second semiconductor structure prepared by the preparation method of any one of claims 1-8 or based on the semiconductor structure of any one of claims 9-11, comprising the steps of: Pre-treating, namely performing vacuum heating and surface plasma activation treatment on the first semiconductor structure and the second semiconductor structure to activate the gas absorbing layer; pre-bonding, namely bonding the bonding surfaces of the first semiconductor structure and the second semiconductor structure after pretreatment in a facing manner, and pressing the pre-bonding; Annealing, namely carrying out heat treatment on the semiconductor structure after pre-bonding in an inert gas or vacuum environment to finish bonding.
13. A semiconductor device, characterized in that it is manufactured by the bonding method according to claim 12.

Description

Semiconductor structure, preparation method, bonding method and semiconductor device Technical Field The present application relates to the field of semiconductor technology, and in particular, to a semiconductor structure, a method for manufacturing the semiconductor structure, a bonding method, and a semiconductor device. Background As integrated circuit technology moves toward smaller size, higher performance, and three-dimensional integration, hybrid bonding technology has become a key technology for achieving ultra-high density interconnection and stacking of chips. The technology eliminates the traditional bump or solder ball, and the surfaces of the copper columns of the two wafers and surrounding insulating media (such as silicon dioxide, silicon carbonitride and the like) are flattened, cleaned and have high activity by embedding metal columns (such as copper columns) on the surfaces of the wafers and carrying out surface treatment. And aligning and attaching the two wafers, completing pre-bonding by virtue of Van der Waals force and hydrogen bonding action on the surfaces of the wafers, and then forming covalent bonds by high-temperature annealing, so as to realize permanent bonding of copper-copper and medium-medium. However, the current hybrid bonding technology has the following problems: First, copper atoms have a tendency to diffuse into the surrounding medium during high temperature annealing. Especially when there is a slight deviation in the alignment of the wafer bonding surfaces, the copper pillar surfaces of the two wafers may not overlap, resulting in a portion of the copper interface being attached to the dielectric interface of the opposite wafer (as shown by the red dashed circle in fig. 1). This exacerbates the risk of copper diffusion into the dielectric layer, thereby affecting the dielectric layer's insulating properties. Second, the difference in thermal expansion coefficients between the copper and the medium (e.g., silicon dioxide) that make up the hybrid bonding interface is significant, and the volume expansion of copper is much greater than that of the surrounding medium layer during high temperature annealing. This non-uniform expansion can create significant localized stresses at the copper-dielectric interface, leading to copper extrusion and possible extrusion or damage to the dielectric layer, introducing mechanical defects such as microcracking or delamination at the interface. Further, the final strength and densification of the hybrid bond is dependent on the high temperature annealing process. In this process, reactive groups (e.g., hydroxyl groups) on the surface of the dielectric layer (e.g., silica) undergo a dehydration condensation reaction to form a strong covalent bond. However, this chemical reaction releases moisture as a byproduct, and at the closed bonding interface, the moisture may further react with materials such as silicon at high temperature to generate hydrogen. If these gases cannot be timely and effectively removed or absorbed at the interface, the gases will locally accumulate, resulting in voids or micro-gaps at the bonding interface, severely affecting the bonding interface quality. Disclosure of Invention It is therefore an object of the present application to provide a semiconductor structure and a method for fabricating the same that can improve the problems of copper diffusion, thermal mechanical stress damage, and voids caused by bonding annealing by-product gases in hybrid bonding technology. Another object of the present application is to provide a bonding method based on the semiconductor structure prepared as described above, so as to improve the bonding interface quality. In order to solve the technical problems, the application adopts the following technical scheme: In a first aspect, the present application provides a method for preparing a semiconductor structure, comprising the steps of: providing a semiconductor substrate with a metal interconnection layer; forming a dielectric layer on the semiconductor substrate; Etching the dielectric layer to form a groove; firstly conformally depositing an air suction layer on the dielectric layer, and then depositing a protective layer until the grooves are filled; etching the protective layer, the getter layer and the dielectric layer to form a through hole penetrating through the groove and connected to the metal interconnection layer; Filling a metal material layer in the through hole; The thinning treatment is stopped at the top of the groove to form a bonding surface, and the bonding surface comprises a metal column, and a protective layer, an air suction layer and a medium layer which encircle the metal column. Further, the air suction layer is of a porous structure with plastic deformation capability. Further, the getter layer adopts one or more of a porous metal layer, a porous alloy layer and a porous metal oxide layer. Further, the porosity of the air-absorbing layer ranges fro