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CN-121985813-A - Semiconductor structure and preparation method thereof

CN121985813ACN 121985813 ACN121985813 ACN 121985813ACN-121985813-A

Abstract

The semiconductor structure comprises a substrate, wherein a conductive block is arranged in the substrate, a dielectric layer is arranged on the substrate, the substrate is covered, a conductive plug penetrates through the dielectric layer and is connected with the conductive block, the conductive plug comprises a first part, a second part and a third part, the first part, the second part and the third part are sequentially stacked in the direction perpendicular to the substrate, the cross-sectional dimension of the first part is respectively larger than that of the second part and the third part, the side wall slope of the second part is different from that of the third part, and the ratio of the height of the second part to that of the third part is 1:2.5-1:4. The appearance of the bottom of the conductive plug can be accurately controlled, so that the conductive plug is effectively connected with the conductive block, the conductive plug is prevented from forming a short circuit, the electrical property and the yield of the semiconductor structure are improved, the preparation process window is increased, and the preparation process difficulty is reduced.

Inventors

  • SUO HAO
  • WANG YAO
  • JI GANG
  • HAN YUZHU

Assignees

  • 长鑫科技集团股份有限公司

Dates

Publication Date
20260505
Application Date
20241028

Claims (10)

  1. 1. A semiconductor structure, comprising: a substrate having a conductive block therein; A dielectric layer on the substrate, covering the substrate; A conductive plug penetrating the dielectric layer and connected with the conductive block; The conductive plug comprises a first part, a second part and a third part, wherein the first part, the second part and the third part are sequentially stacked in the direction perpendicular to the substrate, the section size of the first part is respectively larger than that of the second part and that of the third part, the side wall slope of the second part is different from that of the third part, and the ratio of the height of the second part to that of the third part is 1:2.5-1:4.
  2. 2. The semiconductor structure of claim 1, wherein, The conductive block has a cross-sectional dimension that is greater than a cross-sectional dimension of the first portion.
  3. 3. The semiconductor structure of claim 1, wherein, The conductive block has a cross-sectional dimension that is smaller than a cross-sectional dimension of the first portion.
  4. 4. A semiconductor structure according to any one of claims 1-3 wherein, The cross-sectional dimension of the end of the second portion adjacent the first portion is greater than the cross-sectional dimension of the end of the second portion adjacent the third portion; the cross-sectional dimension of the end of the third portion proximate to the second portion is smaller than the cross-sectional dimension of the end of the third portion distal to the second portion.
  5. 5. The semiconductor structure of claim 4, wherein, The dielectric layer also comprises an etching stop layer, the etching stop layer is positioned in the middle of the dielectric layer, and the joint of the second part and the third part is formed.
  6. 6. A method for preparing a semiconductor structure is characterized in that, Providing a substrate, wherein a conductive block is formed in the substrate; Forming a dielectric layer on the substrate, wherein the dielectric layer covers the substrate; forming a conductive plug in the dielectric layer, wherein the conductive plug penetrates through the dielectric layer and is connected with the conductive block; The conductive plug comprises a first part, a second part and a third part, wherein the first part, the second part and the third part are sequentially stacked in the direction perpendicular to the substrate, the cross section size of the first part is respectively larger than that of the second part and that of the third part, the side wall slope of the second part is different from that of the third part, and the height ratio of the second part to the third part is 1:2.5-1:4.
  7. 7. The method of manufacturing a semiconductor structure as claimed in claim 6, wherein, The method further comprises the following steps before forming the dielectric layer on the substrate: and forming a sacrificial layer on the substrate, wherein the sacrificial layer covers the conductive block.
  8. 8. The method of claim 7, wherein forming a conductive plug in the dielectric layer comprises: forming a first hole in the dielectric layer by using a first etching method; forming a second hole in the dielectric layer by using a second etching method, wherein the second hole is arranged at the bottom of the first hole and is connected with the first hole, and the bottom of the second hole exposes the sacrificial layer; etching and removing the sacrificial layer by using a third etching method to form a third hole, wherein the third hole is connected with the second hole, and the bottom of the third hole exposes the conductive block; Depositing a conductive material in the first hole, the second hole and the third hole to form the conductive plug.
  9. 9. The method for manufacturing a semiconductor structure according to any one of claims 6 to 8, wherein, The cross-sectional dimension of the end of the second portion adjacent the first portion is greater than the cross-sectional dimension of the end of the second portion adjacent the third portion; the cross-sectional dimension of the end of the third portion proximate to the second portion is smaller than the cross-sectional dimension of the end of the third portion distal to the second portion.
  10. 10. The method of manufacturing a semiconductor structure as claimed in claim 9, wherein, The dielectric layer further comprises an etching stop layer, the etching stop layer is positioned in the middle of the dielectric layer, and the junction of the second part and the third part is formed.

Description

Semiconductor structure and preparation method thereof Technical Field The present application relates to the field of integrated circuit technology, and in particular, to a semiconductor structure and a method for manufacturing the semiconductor structure. Background Due to the development of electronic technology, the miniaturization of semiconductor structures has progressed rapidly, the design rules of semiconductor structures are decreasing, and the fabrication process of transistors has entered the 10 nm scale or even the 3 nm scale. However, as the size of the semiconductor structure is reduced, the depth-to-width ratio of the conductive plug is larger and larger, and the difficulty in preparing the conductive plug is also larger and larger, especially the shape of the bottom of the conductive plug is difficult to control, so that the risk of disconnection between the conductive plug and the conductive block is caused, the electrical property of the semiconductor structure is influenced, and the yield of the semiconductor structure is reduced. Disclosure of Invention Based on the above, the embodiment of the application provides a semiconductor structure and a preparation method of the semiconductor structure, which can enlarge the window of the preparation process of the conductive plug and reduce the risk of short circuit of the conductive plug. In a first aspect, the present application provides, according to some embodiments, a semiconductor structure comprising: a substrate having a conductive block therein; A dielectric layer on the substrate, covering the substrate; the conductive plug penetrates through the dielectric layer and is connected with the conductive block; The conductive plug comprises a first part, a second part and a third part, wherein the first part, the second part and the third part are sequentially stacked in the direction perpendicular to the substrate, the section size of the first part is respectively larger than that of the second part and that of the third part, the side wall slope of the second part is different from that of the third part, and the ratio of the height of the second part to that of the third part is 1:2.5-1:4. In some embodiments, the conductive block has a cross-sectional dimension that is greater than a cross-sectional dimension of the first portion. In some embodiments, the conductive block has a cross-sectional dimension that is less than a cross-sectional dimension of the first portion. In some embodiments, the cross-sectional dimension of the end of the second portion proximate the first portion is greater than the cross-sectional dimension of the end of the second portion proximate the third portion; The cross-sectional dimension of the end of the third portion proximate to the second portion is smaller than the cross-sectional dimension of the end of the third portion distal to the second portion. In some embodiments, the dielectric layer further includes an etch stop layer, the etch stop layer being located intermediate the dielectric layer, the second portion and the third portion being connected. In a second aspect, the present application also provides a method for preparing a semiconductor structure, including: Providing a substrate, wherein a conductive block is formed in the substrate; Forming a dielectric layer on the substrate, wherein the dielectric layer covers the substrate; forming a conductive plug in the dielectric layer, wherein the conductive plug penetrates through the dielectric layer and is connected with the conductive block; The conductive plug comprises a first part, a second part and a third part, wherein the first part, the second part and the third part are sequentially stacked in the direction perpendicular to the substrate, the cross section size of the first part is respectively larger than that of the second part and that of the third part, the side wall slope of the second part is different from that of the third part, and the height ratio of the second part to the third part is 1:2.5-1:4. In some embodiments, prior to forming the dielectric layer on the substrate, further comprising: and forming a sacrificial layer on the substrate, wherein the sacrificial layer covers the conductive block. In some embodiments, forming a conductive plug in the dielectric layer includes: forming a first hole in the dielectric layer by using a first etching method; forming a second hole in the dielectric layer by using a second etching method, wherein the second hole is arranged at the bottom of the first hole and is connected with the first hole, and the bottom of the second hole exposes the sacrificial layer; etching and removing the sacrificial layer by using a third etching method to form a third hole, wherein the third hole is connected with the second hole, and the bottom of the third hole exposes the conductive block; Depositing a conductive material in the first hole, the second hole and the third hole to form the conductive