CN-121985814-A - Semiconductor device structure and preparation method thereof
Abstract
The invention provides a semiconductor device structure and a preparation method thereof, wherein the semiconductor device structure comprises a substrate, a dielectric layer, a contact hole, a metal layer and a metal layer, wherein the substrate is provided with a contact point, the dielectric layer is formed on the substrate, the contact hole is formed in the dielectric layer and is contacted with Kong Xianlou contact points, the metal layer is formed on the side wall and the bottom of the contact hole, the ratio of the first thickness of the metal layer on the side wall of the contact hole to the second thickness of the metal layer on the two sides of the top of the contact hole is greater than 0.30, and the first thickness of the metal layer on the side wall of the contact hole is greater than 300 nanometers. According to the invention, through controlling the thickness of the dielectric layer, the angle of the contact hole, the metal thickness of the side wall of the contact hole and the proportion of the metal thickness of the side wall of the contact hole to the metal thickness of the top, the coverage thickness of the side wall of the metal layer can be effectively and obviously improved through the cooperative control of the structural parameters, and the local current density is reduced, so that the electromigration life and the reliability of the device are greatly improved.
Inventors
- Yan Jiangbing
- CHEN XIANLONG
- QIU PANPAN
- LI ZHENWEN
- LAI SHENGMING
- Zou Jirun
Assignees
- 粤芯半导体技术股份有限公司
Dates
- Publication Date
- 20260505
- Application Date
- 20260203
Claims (14)
- 1. A semiconductor device structure, the semiconductor device structure comprising: A substrate having a contact point thereon; a dielectric layer formed on the substrate; the contact hole is formed in the dielectric layer, and the contact Kong Xianlou is the contact point; The metal layer is formed on the side wall and the bottom of the contact hole; The ratio of the first thickness of the contact hole side wall metal layer to the second thickness of the contact hole top two side metal layers is greater than 0.30, and the first thickness of the contact hole side wall metal layer is greater than 300 nanometers.
- 2. The semiconductor device structure of claim 1, wherein the dielectric layer has a thickness of 4000 angstroms to 12000 angstroms.
- 3. The semiconductor device structure of claim 1, wherein the dielectric layer comprises a silicon nitride layer and an ethyl orthosilicate layer stacked together, the silicon nitride layer having a thickness of 200 angstroms to 1500 angstroms and the ethyl orthosilicate layer having a thickness of 3500 angstroms to 10500 angstroms.
- 4. The semiconductor device structure of claim 1, wherein the contact hole has sloped sidewalls, the sloped sidewalls having an angle of 60 DEG to 85 DEG with respect to the substrate surface.
- 5. The semiconductor device structure of claim 4, wherein the angle between the sloped sidewall and the substrate surface is 70-80.
- 6. The semiconductor device structure of claim 1, wherein the contact hole has a top width of 2000 nm to 3500 nm.
- 7. The semiconductor device structure of claim 1, wherein the first thickness of the metal layer on the sidewall of the contact hole is 400 nm to 800 nm, and the second thickness of the metal layer on both sides of the top of the contact hole is 1200 nm to 1600 nm.
- 8. The semiconductor device structure of claim 1, wherein the metal layer is aluminum or an aluminum alloy.
- 9. A method of fabricating a semiconductor device structure, the method comprising: Providing a substrate, wherein the substrate is provided with a contact point, and a dielectric layer is formed on the substrate; forming a contact hole in the dielectric layer, wherein the contact Kong Xianlou is the contact point; depositing a metal layer on the side wall and the bottom of the contact hole; The ratio of the first thickness of the contact hole side wall metal layer to the second thickness of the contact hole top two side metal layers is greater than 0.30, and the first thickness of the contact hole side wall metal layer is greater than 300 nanometers.
- 10. The method of manufacturing a semiconductor device structure of claim 9, wherein the dielectric layer has a thickness of 4000 angstroms to 12000 angstroms.
- 11. The method of manufacturing a semiconductor device structure according to claim 9, wherein the dielectric layer comprises a silicon nitride layer and an ethyl orthosilicate layer stacked together, the silicon nitride layer has a thickness of 200 a to 1500 a, and the ethyl orthosilicate layer has a thickness of 3500 a to 10500 a.
- 12. The method of manufacturing a semiconductor device structure according to claim 9, wherein the contact hole has an inclined sidewall, an angle between the inclined sidewall and the substrate surface is 60 ° to 85 °, and a top width of the contact hole is 2000 nm to 3500 nm.
- 13. The method of claim 12, wherein the sidewall angle of the contact hole is controlled by adjusting parameters of an etching process, the parameters including at least one of etching gas ratio, power and pressure.
- 14. The method for manufacturing a semiconductor device structure according to claim 9, wherein the metal layer is aluminum or an aluminum alloy, the temperature of depositing the metal layer on the side wall and the bottom of the contact hole is 200 ℃ to 350 ℃, the first thickness of the metal layer on the side wall of the contact hole is 400 nm to 800 nm, and the second thickness of the metal layer on the two sides of the top of the contact hole is 1200 nm to 1600 nm.
Description
Semiconductor device structure and preparation method thereof Technical Field The invention belongs to the field of semiconductor integrated circuit design and manufacture, and particularly relates to a semiconductor device structure and a preparation method thereof. Background In recent years, consumer electronics MCU chip market size is on the rise. Some mixed signal devices are actively developing in this context. Generally, the higher the integration per unit area of the chip, the more the number of metal layers, the more competitive. However, the higher the number of metal layers of the chip, the greater the wafer warpage, and the more difficult it is to control due to the difference in thermal expansion coefficients between the metal and dielectric layers. The subsequent process is seriously affected, and even the situation of breaking sheets occurs. In this case, a thicker dielectric layer has to be used to compensate for the wafer warpage. However, too thick a dielectric layer may increase the aspect ratio of the metal fill. Which presents challenges for metal filling. The last metal in chip fabrication is the wiring layer, and its filling performance can affect the reliability of the device. If the aluminum (Al) filling effect is not good, the sidewall coverage is low, which in turn may result in an excessive local current density J. It should be noted that the foregoing description of the background art is only for the purpose of providing a clear and complete description of the technical solution of the present application and is presented for the convenience of understanding by those skilled in the art. The above-described solutions are not considered to be known to the person skilled in the art simply because they are set forth in the background of the application section. Disclosure of Invention In view of the above-mentioned drawbacks of the prior art, an object of the present invention is to provide a semiconductor device structure and a method for manufacturing the same, which are used for solving the problem of the prior art that the coverage rate of the sidewall of the contact hole is low, and thus the local current density is too high. In order to achieve the above and other related objects, the present invention provides a semiconductor device structure, which comprises a substrate having a contact point thereon, a dielectric layer formed on the substrate, a contact hole formed in the dielectric layer, the contact Kong Xianlou being the contact point, a metal layer formed on the sidewall and bottom of the contact hole, wherein the ratio of the first thickness of the metal layer on the sidewall of the contact hole to the second thickness of the metal layer on both sides of the top of the contact hole is greater than 0.30, and the first thickness of the metal layer on the sidewall of the contact hole is greater than 300 nm. Optionally, the thickness of the dielectric layer is 4000-12000 angstroms. Optionally, the dielectric layer includes a stacked silicon nitride layer and an ethyl orthosilicate layer, the thickness of the silicon nitride layer is 200-1500 angstroms, and the thickness of the ethyl orthosilicate layer is 3500-10500 angstroms. Optionally, the contact hole has an inclined sidewall, and an angle between the inclined sidewall and the substrate surface is 60 ° to 85 °. Optionally, the angle between the inclined sidewall and the substrate surface is 70 ° -80 °. Optionally, the top width of the contact hole is 2000-3500 nanometers. Optionally, the first thickness of the metal layer on the side wall of the contact hole is 400-800 nanometers, and the second thickness of the metal layer on two sides of the top of the contact hole is 1200-1600 nanometers. Optionally, the metal layer is made of aluminum or aluminum alloy. The invention further provides a preparation method of the semiconductor device structure, which comprises the steps of providing a substrate, forming a dielectric layer on the substrate, forming a contact hole in the dielectric layer, forming the contact Kong Xianlou at the contact point, depositing metal layers on the side wall and the bottom of the contact hole, wherein the ratio of the first thickness of the metal layer on the side wall of the contact hole to the second thickness of the metal layers on the two sides of the top of the contact hole is greater than 0.30, and the first thickness of the metal layer on the side wall of the contact hole is greater than 300 nanometers. Optionally, the thickness of the dielectric layer is 4000-12000 angstroms. Optionally, the dielectric layer includes a stacked silicon nitride layer and an ethyl orthosilicate layer, the thickness of the silicon nitride layer is 200-1500 angstroms, and the thickness of the ethyl orthosilicate layer is 3500-10500 angstroms. Optionally, the contact hole has an inclined sidewall, an angle between the inclined sidewall and the substrate surface is 60 ° -85 °, and a top width of the contact ho