CN-121985843-A - IC package with topside memory module

Abstract

A Printed Circuit Board (PCB) system includes a first Printed Circuit Board (PCB), an Integrated Circuit (IC) package, and a memory module. The IC package includes i) a package substrate, ii) a main IC chip electrically coupled to a top surface of the package substrate, iii) a first contact structure disposed on a bottom surface of the package substrate and electrically coupled to the first PCB, and iv) a second contact structure disposed on the top surface of the package substrate. The memory module includes i) a second PCB, ii) one or more memory IC chips disposed on the second PCB, and iii) a third contact structure disposed on a bottom surface of the second PCB. The interposer electrically couples the second contact structure of the IC package with the third contact structure of the memory module.

Inventors

• D. Azerul
• BEN ARTSI LIAV

Assignees

• 马维尔以色列(M.I.S.L.)有限公司

Dates

Publication Date

20260505

Application Date

20200610

Priority Date

20190610

Claims (20)

1. 1. A printed circuit board, PCB, system comprising: A first PCB having a first number of layers; An integrated circuit IC package comprising i) a package interposer substrate, ii) a main IC chip electrically coupled to a top surface of the package substrate, iii) a first contact structure disposed on a bottom surface of the package substrate and electrically coupled to the first PCB, and iv) a second contact structure disposed on a top surface of the package substrate and laterally spaced apart from the main IC chip; A memory module comprising i) a second PCB having a second number of layers, the second number being less than the first number, ii) one or more memory IC chips disposed on a top surface of the second PCB, and iii) a third contact structure disposed on a bottom surface of the second PCB, the memory module configured to electrically couple the third contact structure to the second contact structure of the IC package via an interposer while the one or more memory chips are laterally spaced apart from the main IC chip, and The interposer is disposed between the second contact structure of the IC package and the third contact structure of the memory module for electrically coupling the second contact structure of the IC package with the third contact structure of the memory module while the one or more memory IC chips of the memory module are laterally spaced apart from the main IC chip.
2. 2. The PCB system of claim 1, wherein the interposer is configured to provide compressive contacts on at least one side of the interposer to electrically couple the second contact structure of the IC package with the third contact structure of the memory module.
3. 3. The PCB system of claim 1, wherein: the memory module includes a plurality of individual memory sub-modules, and The second PCB includes a plurality of individual second PCBs corresponding to the plurality of individual memory sub-modules, respectively, each individual second PCB having one or more memory IC chips disposed on a top surface of the individual second PCB, and iii) a subset of third contact structures disposed on a bottom surface of the individual second PCB.
4. 4. The PCB system of claim 1, wherein said memory module comprises an integral second PCB.
5. 5. The PCB system of any of claims 1-4, wherein: the second PCB of the memory module includes i) a plurality of outer edges, and ii) a plurality of inner edges defining an aperture, and The primary IC chip of the IC package is disposed within the aperture defined by the plurality of inner edges of the second PCB.
6. 6. The PCB system of claim 5, wherein: The IC package includes a cover surrounding the main IC chip and leaving uncovered the second contact structures disposed on the top surface of the package substrate; wherein the cover of the IC package is disposed within the aperture defined by the plurality of inner edges of the second PCB.
7. 7. The PCB system of claim 6, wherein: The cover surrounding the main IC chip includes a heat sink; wherein the heat slug is disposed within the aperture defined by the plurality of inner edges of the second PCB.
8. 8. The PCB system of claim 5, wherein: the third contact structure of the memory module is disposed on the second PCB near the plurality of inner edges, and The PCB system includes the plurality of interposers disposed around the main IC chip between the second contact structures of the IC package and the third contact structures of the memory module.
9. 9. The PCB system of claim 8, wherein: The second contact structure of the IC package is disposed on the package substrate around the IC chip.
10. 10. The PCB system of any of claims 1-4, wherein: the main IC chip includes a processor; a plurality of electrical components disposed on the first PCB, and The processor i) interfaces with the one or more memory IC chips of the memory module via the second contact structures and the interposer disposed on the top surface of the package substrate, and ii) interfaces with a plurality of electrical components disposed on the first PCB via the second contact structures disposed on the bottom surface of the package substrate.
11. 11. The PCB system of any of claims 1-4, wherein: The first contact structure disposed on the bottom surface of the package substrate includes a Ball Grid Array (BGA) contact structure.
12. 12. The PCB system of claim 11, wherein: The first density of the BGA contact structures disposed on the bottom surface of the package substrate is less than the second density of the second contact structures disposed on the top surface of the package substrate.
13. 13. A method for assembling a printed circuit board, PCB, system, comprising: Mounting an integrated circuit, IC, package to a first PCB to electrically couple first contact structures on a bottom surface of a package substrate of the IC package to the first PCB, the IC package comprising a main IC chip, wherein the first PCB has a first number of layers; Stacking and aligning a memory module on the IC package, the memory module comprising i) a second PCB having a second number of layers, the second number being less than the first number, ii) one or more memory IC chips disposed on the second PCB, and iii) a second contact structure disposed on a bottom surface of the second PCB, wherein a third contact structure is disposed on a top surface of the package substrate and laterally spaced from the main IC chips, and The interposer is disposed between the second contact structure and the third contact structure to electrically interconnect the second contact structure of the memory module with the third contact structure disposed on the top surface of the package substrate while the one or more memory IC chips are laterally spaced apart from the main IC chip.
14. 14. The method of claim 13, further comprising: a compressive force is applied to press the memory module and the IC package together such that the interposer electrically connects the second contact structure of the memory module with the third contact structure of the IC package.
15. 15. The method of claim 14, wherein applying the compressive force comprises: The bolt is tightened to apply the compressive force.
16. 16. The method according to claim 13, wherein: the first contact structure disposed on the bottom surface of the package substrate comprises a Ball Grid Array (BGA) contact structure, and Mounting the IC package to the first PCB includes performing a reflow process to connect the BGA contact structure to the first PCB.
17. 17. The method according to claim 13, wherein: Stacking and aligning the memory modules on the IC package includes stacking and aligning memory modules on the IC package that eliminate a processor.
18. 18. The method of any one of claims 13 to 17, wherein: The memory module includes a plurality of individual memory sub-modules, and the second PCB includes a plurality of individual second PCBs corresponding to the plurality of individual memory sub-modules, respectively, each individual second PCB having one or more memory IC chips disposed thereon, and each individual second PCB having a subset of the second contact structures disposed on a bottom surface thereof; Stacking and aligning the memory modules on the IC package includes stacking and aligning each individual memory sub-module on the IC package, and Electrically coupling the second contact structures of the memory modules to the third contact structures of the package substrate includes coupling each subset of the second contact structures of each memory sub-module to a respective subset of the third contact structures of the package substrate.
19. 19. The method of any one of claims 13 to 17, wherein: the memory module includes an integral second PCB, the second contact structure being disposed on a bottom surface of the integral second PCB, and Electrically coupling the second contact structure of the memory module to the third contact structure of the package substrate includes electrically coupling the second contact structure disposed on the bottom surface of the integral second PCB of the memory module to the third contact structure of the package substrate.
20. 20. A Printed Circuit Board (PCB) system comprising: A first PCB; An integrated circuit IC package includes i) a package substrate, ii) a main IC chip electrically coupled to a top surface of the package substrate, iii) a first contact structure disposed on a bottom surface of the package substrate and electrically coupled to the first PCB, and iv) a second contact structure disposed on a top surface of the package substrate A heat dissipation member coupled to the main IC chip; A memory module comprising i) a second PCB, ii) one or more memory IC chips disposed on a top surface of the second PCB, and iii) a third contact structure disposed on a bottom surface of the second PCB, the memory module configured to electrically couple the third contact structure to the second contact structure of the IC package via an interposer while the heat dissipation member dissipates heat from the main IC chip away from the one or more memory IC chips, and The interposer is disposed between the second contact structure of the IC package and the third contact structure of the memory module for electrically coupling the second contact structure of the IC package with the third contact structure of the memory module, while the heat dissipation member dissipates heat from the main IC chip away from the one or more main IC chips.

Description

IC package with topside memory module The application is a divisional application with the application number 202080052891.9 and the name of IC package with a top side memory module, which is submitted on the 6 th and 10 th of the international application day 2020 and enters the national stage of China on the 1 st and 21 th of 2022. Cross Reference to Related Applications The present application claims the benefit of U.S. provisional patent application No.62/859,560 entitled "Ball GRID ARRAY (BGA) Package Upper Connection to Memory Module," filed on 6/10 of 2019, the entire contents of which are incorporated herein by reference. Technical Field The present invention relates generally to Integrated Circuit (IC) packaging technology, and more particularly to IC packages having electrical connections on both bottom and top surfaces of the IC packages. Background Integrated Circuit (IC) packages relate to semiconductor dies (also referred to as IC chips) of an integrated circuit covered in a housing that prevents physical damage, corrosion, etc. to the IC chip. In addition, electrical connection points, such as pins or pads, are provided external to the housing to allow electrical connection with the IC chip within the housing. The IC chip, housing and electrical connection points are sometimes referred to as an IC package. Ball Grid Arrays (BGAs) are surface mount IC packages in which an array of pads on the bottom surface of the BGA package allow the BGA package to be electrically connected to a Printed Circuit Board (PCB), each pad having an attached solder ball. The density of solder balls on a BGA package, sometimes measured by the distance between adjacent balls (pitch size), has an upper limit. As a result, for larger, more complex IC chips, the number of input/output (I/O) connections is greater, and the greater number of solder balls are required for the greater number of input/output (I/O) connections, the overall size of the BGA package increases, which increases the cost of the BGA package. Disclosure of Invention In one embodiment, a Printed Circuit Board (PCB) system includes a first PCB, an Integrated Circuit (IC) package including i) a package substrate, ii) a primary IC chip electrically coupled to a top surface of the package substrate, iii) a first contact structure disposed on a bottom surface of the package substrate and electrically coupled to the first PCB, and iv) a second contact structure disposed on the top surface of the package substrate, a memory module including i) a second PCB, ii) one or more memory IC chips disposed on a top surface of the second PCB, and iii) a third contact structure disposed on a bottom surface of the second PCB, and an interposer disposed between the second contact structure of the IC package and the third contact structure of the memory module to electrically couple the second contact structure of the IC package with the third contact structure of the memory module. In another embodiment, a method for assembling a PCB system includes mounting an IC package to a first PCB to electrically couple first contact structures on a bottom surface of a package substrate of the IC package to the first PCB, the IC package including a main IC chip, stacking and aligning a memory module on the IC package, the memory module including i) a second PCB, ii) one or more memory IC chips disposed on the second PCB, and iii) second contact structures disposed on a bottom surface of the second PCB, and electrically coupling second contact structures disposed on a bottom surface of a second PCB of a memory module to third contact structures disposed on a top surface of a package substrate. Drawings Fig. 1A is a diagram illustrating a top view of an example Printed Circuit Board (PCB) with an Integrated Circuit (IC) package disposed on the PCB, according to one embodiment. FIG. 1B is a diagram illustrating a top view of an exemplary memory module configured to be disposed on the IC package shown in FIG. 1A, according to one embodiment. FIG. 1C is a diagram illustrating a top view of an example PCB system including the memory module of FIG. 1B disposed on the IC package shown in FIG. 1A, according to one embodiment. Fig. 2A-2C are different views of the example PCB system of fig. 1C, according to one embodiment. Fig. 3 is a flowchart of an example for assembling a PCB system according to one embodiment. Detailed Description In the embodiments described below, a Printed Circuit Board (PCB) system includes a first PCB and an Integrated Circuit (IC) package having i) a package substrate, ii) a main IC chip electrically coupled to a top surface of the package substrate, iii) a first contact structure disposed on a bottom surface of the package substrate and electrically coupled to the first PCB, and iv) a second contact structure disposed on the top surface of the package substrate. The PCB system further includes a memory module having i) a second PCB, ii) one or more memory IC chips