CN-121985844-A - Chip packaging structure and manufacturing method

CN121985844ACN 121985844 ACN121985844 ACN 121985844ACN-121985844-A

Abstract

The application provides a chip packaging structure and a manufacturing method thereof, wherein the structure comprises an organic substrate, an inorganic substrate, a chip, a second conductive piece, a first conductive piece and a filling body; the organic substrate and the inorganic substrate are oppositely arranged and respectively provided with a middle part and an end part, the chip, the first conductive piece and the second conductive piece are respectively arranged between the organic substrate and the inorganic substrate, the chip is respectively arranged at the middle part of the organic substrate and the middle part of the inorganic substrate, the first end of the first conductive piece is in conductive connection with the end part of the organic substrate, the first end of the second conductive piece is in conductive connection with the end part of the inorganic substrate, the second end of the first conductive piece is in conductive connection with the second end of the second conductive piece, and the filling body is filled between the organic substrate and the inorganic substrate and coats the chip, the first conductive piece and the second conductive piece. According to the chip packaging structure provided by the application, the organic substrate and the inorganic substrate are respectively adopted and are combined with the conductive piece for interconnection, so that the performance of the chip packaging structure is improved and the cost is reduced.

Inventors

LI LANQING
SUN YU
SHI XIANYU
WAN LIXI
SHEN ZHENGAN

Assignees

成都万应微电子有限公司

Dates

Publication Date: 20260505
Application Date: 20260205

Claims (10)

1. The chip packaging structure is characterized by comprising an organic substrate, an inorganic substrate, a chip, a second conductive piece, a first conductive piece and a filling body; the organic substrate and the inorganic substrate are oppositely arranged and are respectively provided with a middle part and an end part; the chip, the first conductive piece and the second conductive piece are all positioned between the organic substrate and the inorganic substrate; the chip is respectively positioned in the middle of the organic substrate and the middle of the inorganic substrate; The first end of the first conductive piece is in conductive connection with the end part of the organic substrate, and the first end of the second conductive piece is in conductive connection with the end part of the inorganic substrate; the filling body is filled between the organic substrate and the inorganic substrate and coats the chip, the first conductive piece and the second conductive piece.
2. The chip package structure of claim 1, further comprising a waterproof layer covering the organic substrate, the inorganic substrate, and the outer surface of the filler, and/or The inorganic substrate is a ceramic substrate.
3. The chip packaging structure according to claim 1, wherein the filler comprises a molding compound and a potting adhesive; The plastic packaging material is filled in a first space between the organic substrate and the inorganic substrate, and the pouring sealant is filled in a second space between the organic substrate and the inorganic substrate, wherein the first space is close to the organic substrate, and the second space is close to the inorganic substrate; the first conductive piece is positioned in the plastic package material except for the end face of the second end of the first conductive piece.
4. The chip package structure of claim 1, wherein a contact surface of the first conductive member and the second conductive member is greater than 2/3 times an end area of the second end of the first conductive member; The contact surface is greater than 2/3 times the end area of the second end of the second conductive member.
5. The chip package structure of claim 1, wherein the structure further comprises a first insulating medium and/or a second insulating medium; the first insulating medium is filled in the filling body and at most coats the part of the first conductive piece except the end face of the second end of the first conductive piece; the second insulating medium is filled in the filling body and at most coats the part of the second conductive piece except the end face of the second end of the second conductive piece.
6. The chip package structure of claim 1, wherein the structure further comprises a conductive medium; the first conductive member is connected with the organic substrate through the conductive medium, and/or The first conductive member is connected with the second conductive member through the conductive medium, and/or The second conductive member is connected with the inorganic substrate through the conductive medium.
7. A method of manufacturing a chip package structure, comprising: Preparing an organic substrate with a first conductive member and a chip, and an inorganic substrate with a second conductive member and a chip, respectively, and Aligning and mounting the inorganic substrate and the organic substrate, wherein the first conductive piece is in conductive connection with the second conductive piece; And filling a filler between the organic substrate and the inorganic substrate, wherein the filler coats the chip, the first conductive piece and the second conductive piece.
8. The method of manufacturing a chip package structure according to claim 7, wherein after the filling body is injected between the organic substrate and the inorganic substrate, the method further comprises: and coating a waterproof layer on the outer surfaces of the organic substrate, the inorganic substrate and the filling body.
9. The method of manufacturing a chip package structure according to claim 7, wherein preparing the organic substrate with the first conductive member and the chip and the inorganic substrate with the second conductive member and the chip, respectively, comprises: injecting plastic packaging material into the surfaces of the first conductive piece and the chip, wherein the parts of the first conductive piece except the end face of the second end of the first conductive piece are positioned in the plastic packaging material; The filling body is injected between the organic substrate and the inorganic substrate, and the filling body comprises: pouring sealant into a gap between the organic substrate and the inorganic substrate.
10. The method of manufacturing a chip package according to claim 9, wherein the injecting a molding compound into the surface of the organic substrate where the first conductive member and the chip are disposed comprises: Welding a first end of the first conductive member to an end of the organic substrate; the chip mounter is controlled to align with a position mark on the organic substrate, and the chip is mounted to the position mark; Injecting plastic packaging material into the surface of the organic substrate to form an organic substrate assembly, wherein the first conductive piece is positioned in the plastic packaging material; And grinding the surface of the organic substrate component, which is opposite to the organic substrate, until the end face of the second end of the first conductive piece is exposed out of the plastic package material.

Description

Chip packaging structure and manufacturing method Technical Field The application relates to the technical field of chips, in particular to a chip packaging structure and a manufacturing method. Background Package on Package (POP for short), package on package, is used as a typical packaging technology, and by stacking and integrating chips in a vertical direction, the interconnect length is shortened, the signal transmission rate is improved, and the area of a Printed Circuit Board (PCB) is effectively saved. The traditional POP package mainly adopts the following realization modes that firstly, an all-organic substrate POP structure is adopted, namely, an upper layer package and a lower layer package are both made of organic materials and serve as substrates, secondly, an all-ceramic substrate POP structure is adopted, an upper layer package and a lower layer package are both made of inorganic materials such as alumina (Al 2O3) or aluminum nitride (AlN) and the like and serve as substrates, thirdly, a wafer-level POP structure is adopted, and after a rewiring process is carried out on a plurality of chips, the chips are interconnected through a bump or through silicon via process. However, the all-organic substrate POP itself has strong hygroscopicity, and delamination, electromigration, or corrosion is liable to occur under a high-temperature and high-humidity environment, resulting in a significant decrease in long-term reliability. The POP material of the all-inorganic substrate has high cost, large weight and limited wiring capacity, is difficult to meet the requirement of high-density interconnection, and is not beneficial to mass production. The wafer-level POP depends on a complex TSV process, has extremely high manufacturing cost and low yield, is only suitable for high-end special scenes, and is difficult to popularize in middle-end and low-end markets. That is, it is difficult to combine high performance with low cost in the conventional chip package structure. Disclosure of Invention The application aims to provide a chip packaging structure and a manufacturing method, wherein an organic substrate and an inorganic substrate are respectively adopted and are combined with a conductive piece to be interconnected, so that the packaging of a chip is realized, the performance of the chip packaging structure can be improved, and the cost is reduced. The application provides a chip packaging structure which comprises an organic substrate, an inorganic substrate, a chip, a second conductive piece, a first conductive piece and a filler, wherein the organic substrate and the inorganic substrate are arranged oppositely and respectively provided with a middle part and an end part, the chip, the first conductive piece and the second conductive piece are respectively positioned between the organic substrate and the inorganic substrate, the chip is respectively positioned in the middle part of the organic substrate and the middle part of the inorganic substrate, the first end of the first conductive piece is in conductive connection with the end part of the organic substrate, the first end of the second conductive piece is in conductive connection with the end part of the inorganic substrate, the second end of the first conductive piece is in conductive connection with the second end of the second conductive piece, and the filler is filled between the organic substrate and the inorganic substrate and covers the chip, the first conductive piece and the second conductive piece. According to the chip packaging structure, the processing cost of the chip packaging structure is reduced by adopting the mixed stacking framework of the organic substrate and the inorganic substrate, and the reliability, the integration level, the moisture resistance and the corrosion resistance of the chip packaging structure are improved, so that the high performance and the low cost are both considered. With the first aspect, the structure optionally further comprises a waterproof layer, wherein the waterproof layer is coated on the outer surfaces of the organic substrate, the inorganic substrate and the filling body. According to the chip packaging structure, the waterproof layer is arranged, so that the path of penetration of moisture from the chip packaging structure can be blocked, particularly moisture-absorbing areas such as the side wall of the organic substrate can be blocked, and the moisture resistance of the chip packaging structure is further improved. With the combination of the first aspect, the filling body optionally comprises a plastic package material and a pouring sealant, wherein the plastic package material is filled in a first space between the organic substrate and the inorganic substrate, the pouring sealant is filled in a second space between the organic substrate and the inorganic substrate, the first space is close to the organic substrate, the second space is close to the inorganic substrate, and the part o