CN-121985848-A - Chip stack package, manufacturing method thereof and electronic equipment

CN121985848ACN 121985848 ACN121985848 ACN 121985848ACN-121985848-A

Abstract

The application provides a chip stacking package, a manufacturing method thereof and electronic equipment, relating to the technical field of packaging, the package structure realizes the connection between the upper wiring structure and the lower wiring structure (such as two rewiring layers) by adopting a prefabricated interconnection module. The stacked package comprises a first chip, a second chip, a first wiring structure, a second wiring structure and a prefabricated interconnection module which are stacked. The first wiring structure is arranged on one side of the first chip far away from the second chip and is electrically connected with the first chip. The second wiring structure is arranged between the first chip and the second chip and is electrically connected with the second chip. The prefabricated interconnection module is connected between the second wiring structure and the first wiring structure. The prefabricated interconnection module comprises metal posts and welding spots. One end of the metal column is electrically connected with the second wiring structure or the first wiring structure through welding spots, and the other end of the metal column is electrically connected with the first wiring structure or the second wiring structure. The evolution requirement of the packaging structure can be met by adopting the prefabricated interconnection module.

Inventors

WANG JIAMING
Zhou Tianshen
ZHAO PENGYU
HAN CHAO
JIANG SHANGXUAN
ZHAO NAN

Assignees

华为技术有限公司

Dates

Publication Date: 20260505
Application Date: 20241029

Claims (15)

1. A chip stack package, comprising: A first chip and a second chip which are stacked; The first wiring structure is arranged on one side of the first chip far away from the second chip and is electrically connected with the first chip; The second wiring structure is arranged between the first chip and the second chip and is electrically connected with the second chip; the prefabricated interconnection module is connected between the second wiring structure and the first wiring structure; The prefabricated interconnection module comprises a metal column and welding spots, wherein one end of the metal column is electrically connected with the second wiring structure through the welding spots, the other end of the metal column is electrically connected with the first wiring structure, or one end of the metal column is electrically connected with the first wiring structure through the welding spots, and the other end of the metal column is electrically connected with the second wiring structure.
2. The chip stack package of claim 1, wherein the die is disposed on the substrate, The metal posts comprise first metal posts and second metal posts which are interconnected along the axial direction.
3. The chip stack package according to claim 1 or 2, wherein, The prefabricated interconnection module comprises a molding layer and a molding through hole TMV arranged in the molding layer, wherein the molding through hole TMV is used for forming the metal column.
4. The chip stack package of claim 3, wherein the die is disposed on the substrate, The molding through hole TMV comprises a first copper pillar and a second copper pillar which are mutually connected in the vertical direction, wherein the first copper pillar and the second copper pillar are connected through a seed layer.
5. The chip stack package according to claim 1 or 2, wherein, The prefabricated interconnection module comprises a silicon wafer and a Through Silicon Via (TSV) arranged in the silicon wafer, wherein the TSV is used for forming the metal column.
6. The chip stack package according to claim 1 or 2, wherein, The prefabricated interconnection module comprises a glass sheet and a glass through hole TGV arranged in the glass sheet, wherein the glass through hole TGV is used for forming the metal column.
7. The chip stack package according to any one of claims 1-6, wherein, The chip stacking package also comprises a heat dissipation block; The first rewiring is provided with a window corresponding to the first chip, and the radiating block is arranged on one side, away from the first wiring structure, of the first chip and extends into the window.
8. The chip stack package according to any one of claims 1-7, wherein, The first chip includes a system on chip, SOC.
9. The chip stack package according to any one of claims 1-8, wherein, The second chip comprises a double rate synchronous dynamic random memory chip DDR.
10. The chip stack package according to any of the claims 1-9, wherein, The thickness of the first chip is more than 200 mu m.
11. A method of fabricating a chip stack package, comprising: manufacturing a first wiring structure; Providing a prefabricated interconnection module, welding the prefabricated interconnection module on the surface of a first wiring structure, and welding a first chip on the surface of the first wiring structure, wherein the prefabricated interconnection module comprises a metal column and welding spots, and the bottom ends of the metal columns are electrically connected with the first wiring structure through the welding spots; performing plastic packaging on the first chip and the prefabricated interconnection module, and exposing the top end of the metal column through a grinding process; and manufacturing a second wiring structure, and arranging a second chip on the second wiring structure, wherein the second chip is electrically connected with the metal column through the second wiring structure.
12. The method of manufacturing a chip stack package according to claim 11, wherein, The providing a prefabricated interconnection module includes: forming a plurality of first metal columns on a carrier plate, performing plastic package on the first metal columns, and exposing the top ends of the first metal columns through grinding; Forming a plurality of second metal columns at the top ends of the plurality of first metal columns, and performing plastic package on the plurality of second metal columns, wherein the bottoms of the plurality of second metal columns are respectively connected with the top ends of the plurality of first metal columns through conductive bonding layers; And removing the carrier plate, forming a plurality of welding spots at the bottom ends of the first metal columns respectively, and exposing the top ends of the second metal columns through grinding.
13. A method of fabricating a chip stack package, comprising: Manufacturing a second wiring structure; providing a prefabricated interconnection module, welding the prefabricated interconnection module on the surface of a second wiring structure, and attaching a first chip on the surface of the second wiring structure, wherein the prefabricated interconnection module comprises a metal column and a welding spot, and the bottom end of the metal column is electrically connected with the second wiring structure through the welding spot; performing plastic packaging on the first chip and the prefabricated interconnection module, and exposing the top end of the metal column and the connecting disc on the surface of the first chip through a grinding process; manufacturing a first wiring structure, wherein the first wiring structure is electrically connected with the top end of the metal column and the connecting disc on the surface of the first chip; And arranging a second chip on the surface of one side of the second wiring structure far away from the first chip.
14. The method of manufacturing a chip stack package according to claim 13, wherein, The providing a prefabricated interconnection module includes: forming a plurality of first metal columns on a carrier plate, performing plastic package on the first metal columns, and exposing the top ends of the first metal columns through grinding; Forming a plurality of second metal columns at the top ends of the plurality of first metal columns, and performing plastic package on the plurality of second metal columns, wherein the bottoms of the plurality of second metal columns are respectively connected with the top ends of the plurality of first metal columns through conductive bonding layers; And removing the carrier plate, forming a plurality of welding spots at the bottom ends of the first metal columns respectively, and exposing the top ends of the second metal columns through grinding.
15. An electronic device comprising a circuit board and a chip stack package according to any of claims 1-10, wherein the circuit board is electrically connected to the chip stack package.

Description

Chip stack package, manufacturing method thereof and electronic equipment Technical Field The present application relates to the field of packaging technologies, and in particular, to a chip stack package, a manufacturing method thereof, and an electronic device. Background POP (package on package) packaging is a technique to package multiple integrated circuits (ICs, chips) together to achieve smaller, lighter, thinner electronic devices. In POP packages, where one package is stacked on top of another, this technique may improve circuit board space utilization, reduce the overall size and weight of the device, and improve performance. Referring to fig. 1, a conventional POP package includes an upper package and a lower package stacked together, the lower package includes a first redistribution layer RDL1 and a first chip D1 disposed on the first redistribution layer RDL1, and the upper package includes a second redistribution layer RDL2 and a second chip D2 disposed on the second redistribution layer RDL 2. The first redistribution layer RDL1 and the second redistribution layer RDL2 are connected through a molding hole TMV (through mold via). As the stack packaging technology evolves, the thickness of the first chip D1 increases, which requires that the height of the molding hole TMV be larger and the corresponding Aspect Ratio (AR) be smaller. In addition, in order to satisfy high-density interconnection, the density of the molding-hole TMV also needs to be increased. However, the existing fabrication of the molding hole TMV mainly focuses on the thick-film and dry-film processes, and the fabrication of the molding hole TMV is realized by first fabricating a Photoresist (PR) with a high thickness and then opening the photoresist, and then performing an electroplating process. The use of this process to make molded hole TMV does not meet the further evolving needs of molded hole TMV for AR and density. Disclosure of Invention The application provides a chip stacking package, a manufacturing method thereof and electronic equipment, which can meet the evolution requirement of the chip stacking package by adopting a prefabricated interconnection module to realize connection between an upper wiring structure (such as a rewiring layer) and a lower wiring structure (such as a rewiring layer). The application provides a chip stacking package which comprises a first chip, a second chip, a first wiring structure, a second wiring structure and a prefabricated interconnection module, wherein the first chip and the second chip are stacked. The first wiring structure is arranged on one side of the first chip far away from the second chip and is electrically connected with the first chip. The second wiring structure is arranged between the first chip and the second chip and is electrically connected with the second chip. The prefabricated interconnection module is connected between the second wiring structure and the first wiring structure. The prefabricated interconnection module comprises metal posts and welding spots. One end of the metal column is electrically connected with the second wiring structure through a welding spot, and the other end of the metal column is electrically connected with the first wiring structure. Or one end of the metal column is electrically connected with the first wiring structure through a welding spot, and the other end of the metal column is electrically connected with the second wiring structure. Among the above-mentioned packaging structure, adopt prefabricated interconnection module to connect between first wiring structure and second wiring structure, this prefabricated interconnection module can customize according to packaging structure's demand, through the equipment welding between first wiring structure and second wiring structure to satisfy first wiring structure and second wiring structure in the ascending interconnection demand of vertical direction. The vertical interconnection structure (metal column) adopted in the prefabricated interconnection module is not required to be manufactured based on a thick glue or dry film process, but can be manufactured by adopting other processes (such as an electroplating process and the like), so that the Aspect Ratio (AR) and the density of the metal column are not limited, and further the evolution requirement of the chip stacking and packaging can be met. In some possible implementations, the first routing structure may be a first rewiring layer. In some possible implementations, the second routing structure may be a second redistribution layer. In some possible implementations, the metal posts include first and second metal posts interconnected in an axial direction. Under the condition, the metal columns can be manufactured in a segmented mode, so that the evolution requirement of the chip stacking package can be met better. In some possible implementations, the pre-fabricated interconnect module includes a molding layer and a mold