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CN-121985861-A - Laminate bonding material, semiconductor package, and power module

CN121985861ACN 121985861 ACN121985861 ACN 121985861ACN-121985861-A

Abstract

The invention provides a laminate bonding material, a semiconductor package, and a power module. The laminated bonding material (10) comprises a base material (11), a first solder part (12 a) laminated on a first surface of the base material (11), and a second solder part (12 b) laminated on a second surface of the base material (11), wherein the linear expansion coefficient of the base material (11) is 5.5-15.5 ppm/K, the first solder part (12 a) and the second solder part (12 b) are composed of lead-free solder, and the thickness of the first solder part (12 a) and the thickness of the second solder part (12 b) are both 0.05-1.0 mm.

Inventors

  • KAMEDA NAOTO
  • Idei Kodai
  • Tuwu political people

Assignees

  • 千住金属工业株式会社

Dates

Publication Date
20260505
Application Date
20220418
Priority Date
20210428

Claims (16)

  1. 1. A laminate bonding material comprising a base material, a first solder part laminated on a first surface of the base material, and a second solder part laminated on a second surface of the base material, The linear expansion coefficient of the base material is 5.5-15.5 ppm/K, The first solder portion and the second solder portion are constituted by lead-free solder, The Young's modulus of the lead-free solder is 45GPa or more and the tensile strength is 100MPa or less, The thickness of the first solder part and the thickness of the second solder part are respectively below 0.1mm, and the ratio of the base material to the thickness of the first solder part and the ratio of the base material to the thickness of the second solder part are respectively 2:1-4:1.
  2. 2. The laminate bonding material according to claim 1, wherein the Young's modulus of the lead-free solder is 55GPa or more.
  3. 3. The laminate bonding material according to claim 1 or 2, wherein the base material has a lattice shape with lattice intervals of 2.0mm or more.
  4. 4. The laminate bonding material according to claim 1 or 2, wherein the linear expansion coefficient of the base material is 5.9 to 14.4ppm/K.
  5. 5. The laminate bonding material according to claim 4, wherein the linear expansion coefficient of the base material is 7.0 to 11.6ppm/K.
  6. 6. The laminate bonding material according to claim 2, wherein the linear expansion coefficient of the base material is 7.7 to 9.9ppm/K.
  7. 7. The laminate bonding material according to claim 1 or 2, wherein the base material is composed of any one of a Cu-W based material, a Cu-Mo based material, a laminate of a Cu-W based material and a Cu-Mo based material, a composite in which a Cu-based material is laminated on each of a first surface and a second surface of the Cu-W based material, a composite in which a Cu-based material is laminated on each of a first surface and a second surface of the Cu-Mo based material, and a composite in which a Cu-based material is laminated on each of a first surface and a second surface of the laminate of the Cu-W based material and the Cu-Mo based material.
  8. 8. The laminate bonding material according to claim 1 or 2, wherein the Cu content of the base material is 60% or less.
  9. 9. The laminate bonding material according to claim 1 or 2, wherein the Cu content of the base material is 15% or more.
  10. 10. The laminate bonding material according to claim 1 or 2, wherein the material of the lead-free solder is selected from the group consisting of a Sn-based alloy, a Sn-Ag-based alloy, a Sn-Cu-based alloy, a Sn-Sb-based alloy, a Sn-Ag-Cu-In-based alloy, a Sn-Ag-Cu-Bi-Sb-based alloy, a Sn-Bi-based alloy, and a Sn-In-based alloy.
  11. 11. The laminate bonding material according to claim 1 or 2, wherein the melting point of the lead-free solder is 210 ℃ or higher.
  12. 12. The laminate bonding material according to claim 1 or 2, wherein the lead-free solder has a melting point of 230 ℃ or higher.
  13. 13. A semiconductor package comprising a substrate, a semiconductor element disposed on the substrate, and a laminate bonding material disposed between the substrate and the semiconductor element and bonding the substrate and the semiconductor element, The laminate bonding material comprises a base material, a first solder part laminated on a first surface of the base material, and a second solder part laminated on a second surface of the base material, wherein the linear expansion coefficient of the base material is 5.5-15.5 ppm/K, the first solder part and the second solder part are composed of lead-free solder, The Young's modulus of the lead-free solder is 45GPa or more and the tensile strength is 100MPa or less, The thickness of the first solder part and the thickness of the second solder part are respectively below 0.1mm, and the ratio of the base material to the thickness of the first solder part and the ratio of the base material to the thickness of the second solder part are respectively 2:1-4:1.
  14. 14. A semiconductor package comprising a substrate, a semiconductor element disposed on the substrate, a first laminate bonding material disposed between the substrate and the semiconductor element and bonding the substrate and the semiconductor element, a heat sink portion disposed on the opposite side of the substrate from the semiconductor element, and a second laminate bonding material disposed between the substrate and the heat sink portion and bonding the substrate and the heat sink portion, At least one of the first laminate bonding material and the second laminate bonding material has a base material, a first solder part laminated on a first surface of the base material, and a second solder part laminated on a second surface of the base material, the linear expansion coefficient of the base material is 5.5 to 15.5ppm/K, the first solder part and the second solder part are composed of lead-free solder, The Young's modulus of the lead-free solder is 45GPa or more and the tensile strength is 100MPa or less, The thickness of the first solder part and the thickness of the second solder part are respectively below 0.1mm, and the ratio of the base material to the thickness of the first solder part and the ratio of the base material to the thickness of the second solder part are respectively 2:1-4:1.
  15. 15. A power module includes a substrate, a power semiconductor element disposed on the substrate, and a laminate bonding material disposed between the substrate and the power semiconductor element and bonding the substrate and the power semiconductor element, The laminate bonding material comprises a base material, a first solder part laminated on a first surface of the base material, and a second solder part laminated on a second surface of the base material, wherein the linear expansion coefficient of the base material is 5.5-15.5 ppm/K, the first solder part and the second solder part are composed of lead-free solder, The Young's modulus of the lead-free solder is 45GPa or more and the tensile strength is 100MPa or less, The thickness of the first solder part and the thickness of the second solder part are respectively below 0.1mm, and the ratio of the base material to the thickness of the first solder part and the ratio of the base material to the thickness of the second solder part are respectively 2:1-4:1.
  16. 16. A power module includes a substrate, a power semiconductor element disposed on the substrate, a first laminate bonding material disposed between the substrate and the power semiconductor element and bonding the substrate and the power semiconductor element, a heat dissipation portion disposed on the opposite side of the substrate from the power semiconductor element, and a second laminate bonding material disposed between the substrate and the heat dissipation portion and bonding the substrate and the heat dissipation portion, At least one of the first laminate bonding material and the second laminate bonding material has a base material, a first solder part laminated on a first surface of the base material, and a second solder part laminated on a second surface of the base material, the linear expansion coefficient of the base material is 5.5 to 15.5ppm/K, the first solder part and the second solder part are composed of lead-free solder, The Young's modulus of the lead-free solder is 45GPa or more and the tensile strength is 100MPa or less, The thickness of the first solder part and the thickness of the second solder part are respectively below 0.1mm, and the ratio of the base material to the thickness of the first solder part and the ratio of the base material to the thickness of the second solder part are respectively 2:1-4:1.

Description

Laminate bonding material, semiconductor package, and power module The application is a divisional application of China patent application with the application number 202280030517.8 (International application number PCT/JP 2022/017980), the China national stage entry day of 2023, 10 and 24 (International application day of 2022, 4 and 18), and the application name of laminated bonding material, semiconductor package and power module. Technical Field The present technology relates to a laminate bonding material, a semiconductor package, and a power module. Background Recently, semiconductor devices have been required to have high characteristics, and SiC, gaAs, gaN and the like have been used in addition to Si, which has been conventionally used as a material for semiconductor devices. Semiconductor devices using these materials have excellent characteristics such as being capable of increasing the operating temperature and expanding the band gap, and are used in power semiconductor devices such as power transistors. The power semiconductor element can operate at a high temperature, and the soldered joint at the joint portion may reach a high temperature of 200 ℃ or higher. Under such a high-temperature environment, strain due to the difference in CTE (Coefficient of Thermal Expansion; coefficient of thermal expansion) between the semiconductor element and the substrate occurs in the joint between the semiconductor element and the substrate, and cracks are generated due to the strain, as a result, the life of the power semiconductor product is shortened, which is a problem. Japanese patent application laid-open No. 2009-269075 describes a method for producing a laminated solder material having a soft Pb or Pb-based alloy as a stress relaxation layer. However, since the stress relaxation layer contains Pb, it does not meet environmental restrictions such as RoHS (hazardous substances restriction, restriction of Hazardous Substances). Japanese patent application laid-open No. 2015-23183 discloses a power module including a semiconductor element, a first metal layer formed so that one surface thereof is bonded to the semiconductor element, an organic insulating film formed on an outer peripheral portion of the other surface of the first metal layer in contact with the semiconductor element, a second metal layer formed so as to be bonded to a central portion of the other surface of the first metal layer in contact with the organic insulating film, and a bonding material formed so as to be bonded to the other surface of the first metal layer via the second metal layer. Japanese patent application laid-open No. 2009-147111 discloses a bonding material in which a surface layer is laminated on the upper and lower surfaces of a plate-like central layer, wherein the central layer has a higher melting point than the surface layer, and a specific example of the central layer is described as a single phase of bismuth or an alloy containing bismuth as a main component with silver, copper, antimony, indium, tin, nickel, germanium, tellurium, phosphorus, or the like. Disclosure of Invention The present inventors have conducted intensive studies to find a technique that meets environmental restrictions such as RoHS and can alleviate strain occurring at a joint, and as a result, have found that strain occurring at a joint due to CTE difference between a semiconductor element and a substrate can be alleviated by using a lead-free solder as a solder at a joint and a material having a thermal expansion coefficient within a predetermined range as a core material. Further, the inventors of the present application have found that by limiting the thickness, material, shape of the base material, and the like of the lead-free solder to a specific thickness, material, shape, and the like in such a joint, the stress relaxation effect can be improved, and as a result, the life of the product can be greatly prolonged as compared with the conventional one. It is desirable to provide a laminate bonding material, a semiconductor package, and a power module that can alleviate strain generated at a bonding portion, particularly in a high-temperature environment. The laminate bonding material of one embodiment comprises a base material, a first solder part laminated on a first surface of the base material, and a second solder part laminated on a second surface of the base material, wherein the linear expansion coefficient of the base material is 5.5-15.5 ppm/K, the first solder part and the second solder part are composed of lead-free solder, and the thickness of the first solder part and the thickness of the second solder part are both 0.05-1.0 mm. Drawings Fig. 1 is a longitudinal sectional view showing a schematic configuration of a laminate joint material according to an embodiment. Fig. 2 is a vertical cross-sectional view showing a schematic configuration of a semiconductor package according to an embodiment. Fig. 3A is a table showing th