CN-121985874-A - Organic medium surface morphology control method for hybrid bonding
Abstract
The invention discloses a method for controlling the surface morphology of an organic medium for hybrid bonding, and belongs to the field of integrated circuit packaging. After the wiring layer and the bump bonding pad are manufactured on the surface of the wafer, and the organic dielectric layer is coated in a rotating way, the bonding pad is exposed through a chemical mechanical polishing process, then a plasma etching process is introduced, and the surface of the dielectric layer is accurately etched to be lower than the surface of the bonding pad by utilizing the high selective etching property of the dielectric layer to the organic medium, so that the controllable concave morphology is formed. And aligning two wafers subjected to the morphology treatment, performing thermocompression bonding, and finally performing thermal annealing treatment. In the annealing process, the organic dielectric layer is heated and expanded to fill bonding interface gaps, so that full bonding between dielectric layers is realized, and meanwhile, firm electric connection is formed between bonding pads through atomic diffusion, so that hybrid bonding of heterogeneous interfaces is realized. The method effectively solves the problem that the appearance of the heterogeneous interface is difficult to control due to the fact that the organic medium is soft in material and has large polishing speed difference with metal.
Inventors
- XIA CHENHUI
- LIU SHULI
- WANG GANG
- JI YONG
Assignees
- 中国电子科技集团公司第五十八研究所
Dates
- Publication Date
- 20260505
- Application Date
- 20260129
Claims (10)
- 1. A method for controlling the surface morphology of an organic medium for hybrid bonding, comprising the steps of: Step S1, providing a first wafer (101), wherein a first bonding pad (102) is arranged on the surface of the first wafer (101); Step S2, forming a first dielectric layer (103) on the surface of the first wafer (101), and windowing to form a dielectric layer opening (104) so as to leak out of the first bonding pad (102); Step S3, forming a first wiring layer (105) on the first dielectric layer (103), and forming a second bonding pad (106) on the first wiring layer (105) by electroplating; step S4, spin-coating a second dielectric layer (107) on the surface, wherein the second dielectric layer (107) covers the first wiring layer (105) and the second bonding pad (106); step S5, carrying out chemical mechanical polishing on the surface of the second dielectric layer (107), grinding to leak out the second bonding pad (106), and removing surface impurities and oxides through cleaning; s6, bombarding the second dielectric layer (107) through a plasma etching process, and etching the material of the second dielectric layer (107) on the surface to enable the plane of the second dielectric layer (107) to be lower than the second bonding pad (106); Step S7, repeating the steps, and sequentially forming a third dielectric layer (202), a second wiring layer (203), a third bonding pad (204) and a fourth dielectric layer (205) on the surface of the second wafer (201), wherein through a high-precision wafer hot-pressing bonding process, two wafers processed through a plasma etching process are placed on the surface of the wiring layer of the two wafers by using a high-precision wafer bonding machine, and the centers of the second bonding pad (106) and the third bonding pad (204) are aligned; And S8, performing thermal annealing treatment, wherein the second dielectric layer (107) and the fourth dielectric layer (205) are thermally expanded and fully bonded to fill gaps between two wafers, and the second bonding pad (106) and the third bonding pad (204) are subjected to atomic diffusion and bonded together to finish wafer-level hybrid bonding of the organic medium.
- 2. The method for controlling surface morphology of hybrid bonding organic medium according to claim 1, wherein the first dielectric layer (103) and the second dielectric layer (107) are made of organic materials including polyimide, benzocyclobutene, polybenzoxazole, epoxy resin or acrylic resin, the thickness of the first dielectric layer (103) ranges from 10nm to 1mm, the manner of the dielectric layer opening (104) includes photolithography or laser windowing, and the diameter of the dielectric layer opening (104) is not smaller than 0.1 μm.
- 3. The method for controlling surface morphology of hybrid bond organic medium according to claim 1, wherein the substrate material of the first wafer (101) is silicon-based, gallium arsenide, gallium nitride, indium phosphide, silicon germanium or organic material, the thickness of the first wafer (101) is not less than 50 μm, the material of the first bonding pad (102) is one or more of aluminum, copper, gold, silver, nickel, tin, lead, indium and bismuth, and the thickness of the first bonding pad (102) is not less than 0.1 μm.
- 4. The method of claim 1, wherein the forming of the first wiring layer (105) includes one or more of sputtering, coating, exposing, developing, curing, electroplating, photoresist stripping, the material of the first wiring layer (105) includes one or more of nickel, copper, gold, silver, and aluminum, the thickness of the first wiring layer (105) is not less than 0.1 μm, and the wafer level bump plating process of forming the second pad (106) includes one or more of sputtering, coating, exposing, developing, curing, electroplating, photoresist stripping, and the material of the second pad (106) includes one or more of aluminum, copper, gold, silver, nickel, tin, lead, indium, and bismuth, and the thickness of the second pad (106) is not less than 0.1 μm.
- 5. The method for controlling the surface topography of an organic medium for hybrid bonding according to claim 1, wherein a thickness of said second dielectric layer (107) exceeds a height of said second pad (106) and completely covers said first wiring layer (105) and said second pad (106).
- 6. The method of claim 1, wherein the chemical mechanical polishing is a high precision polishing of the wafer surface to provide the surface with low roughness, and the cleaning solution comprises sulfuric acid, hydrochloric acid, nitric acid, citric acid or a mixture thereof.
- 7. The method of claim 1, wherein the plasma etching is performed by using a mixed gas containing one or more of oxygen, argon, carbon tetrafluoride, nitrogen and hydrogen to remove the surface material of the second dielectric layer (107) and activate the wafer surface, and the surface of the organic second dielectric layer (107) is etched to a height of 0.1nm to 500nm below the surface of the second bonding pad (106) by controlling the process parameters of the plasma etching.
- 8. The method for controlling the surface morphology of the organic medium for hybrid bonding according to claim 1, wherein the wafer thermocompression bonding process comprises thermocompression direct bonding or room temperature alignment and then annealing bonding, and the thermocompression bonding process is performed under the conditions that the temperature is 100 ℃ to 400 ℃ and the pressure is 1kn to 100kn for 1 min to 60 min.
- 9. The method for controlling the surface morphology of the organic medium for hybrid bonding according to claim 1, wherein the annealing process is performed at a temperature of 100 ℃ to 400 ℃ in a vacuum or inert gas atmosphere for 30 minutes to 300 minutes.
- 10. The method for controlling the surface morphology of the organic medium for hybrid bonding according to claim 1, wherein the structure prepared by the method for controlling the surface morphology of the organic medium is applied to three-dimensional integrated packaging of chips-wafers, chips-chips or wafers-wafers.
Description
Organic medium surface morphology control method for hybrid bonding Technical Field The invention relates to the technical field of integrated circuit packaging, in particular to a method for controlling the surface morphology of an organic medium for hybrid bonding. Background As semiconductor device feature sizes continue to shrink, planar scaling following moore's law is increasingly challenged by physical limits and economic costs. The three-dimensional integration technology, in particular to wafer-level three-dimensional integration, is a key path for continuing the system performance improvement, realizing heterogeneous integration and improving the integration density and the interconnection bandwidth by stacking and interconnecting a plurality of chips or wafers in the vertical direction. Hybrid bonding has become a current leading research hotspot and industry in many three-dimensional interconnect technologies because of the ability to simultaneously achieve high density vertical electrical interconnects and robust mechanical connections. Hybrid bonding techniques are permanent bonding techniques that combine dielectric-dielectric bonding with metal-metal bonding. The ideal hybrid bonding requires that the dielectric layer and the metal pad can be firmly combined in a seamless and void-free manner at the bonding interface. However, achieving high quality hybrid bonding presents a significant challenge, one of the key difficulties in surface topography control prior to bonding. If there is a height difference between the dielectric layer surface and the metal pad surface, the protruding pads will first contact and bear most of the bonding pressure during the bonding process, so that the dielectric layers cannot be effectively contacted to generate bonding interface gaps, and the recessed pads may not form reliable electrical connection with the corresponding pads. In the prior art, most of the dielectric materials commonly used for hybrid bonding are inorganic media, such as silicon dioxide, and the surface morphology is usually planarized by chemical mechanical polishing. Because silicon dioxide is hard and chemically stable, a flat surface with a metal (such as copper) substantially consistent with the dielectric surface is easily obtained after CMP. However, limitations of inorganic media are also becoming increasingly prominent, such as their greater brittleness, higher dielectric constants (resulting in signal delays and cross-talk), and higher process temperatures. In order to obtain better electrical properties and mechanical flexibility, industry is beginning to explore the use of organic polymers such as polyimides, benzocyclobutenes, etc. as hybrid-bonded dielectric materials. The organic medium has the advantages of low dielectric constant, good flexibility, relatively low process temperature and the like. However, the organic medium is generally soft, and has significant difference between polishing rate and metal (such as copper) in the CMP process, so that ideal gradient regulation is difficult to realize, and the severe requirement of hybrid bonding on high-precision regulation of the gradient difference of the surface cannot be met. If the bonding is forced, voids are easily generated at the interface between the dielectric layers, or the connection between the metal and the metal is unreliable, so that the problems of weak bonding strength, low yield, poor long-term reliability and the like are caused. Therefore, the surface morphology control method for the organic medium is urgently needed in the field, the relative height of the organic medium layer and the metal bonding pad before bonding can be accurately regulated and controlled, and a foundation is laid for realizing high-quality and high-reliability wafer-level organic medium hybrid bonding subsequently. Disclosure of Invention The invention aims to provide a method for controlling the surface morphology of an organic medium for hybrid bonding, which aims to solve the problems in the background technology. In order to solve the technical problems, the invention provides a method for controlling the surface morphology of an organic medium for hybrid bonding, which comprises the following steps: step S1, providing a first wafer, wherein a first bonding pad is arranged on the surface of the first wafer; s2, forming a first dielectric layer on the surface of the first wafer, and windowing to form a dielectric layer opening so as to leak out of the first bonding pad; step S3, forming a first wiring layer on the first dielectric layer; Step S4, spin-coating a second dielectric layer on the surface, wherein the second dielectric layer covers the first wiring layer and the second bonding pad; S5, carrying out chemical mechanical polishing on the surface of the second dielectric layer, grinding to leak out the second bonding pad, and removing surface impurities and oxides through cleaning; s6, bombarding the second dielectric layer