Search

CN-121986311-A - SSD power management using hybrid PCIe link state approach

CN121986311ACN 121986311 ACN121986311 ACN 121986311ACN-121986311-A

Abstract

In contrast to utilizing Peripheral Component Interconnect (PCI) express (PCIe) link speed adjustment and PCIe link power state alone, PCIe link speed adjustment and PCIe link power state policies are used in combination. The combination balances PCIe front-end energy costs, back-end energy costs, and quality of service (QoS). The performance/power space of a Solid State Drive (SSD) is mapped to PCIe link speed adjustment and PCIe link power state policies to configure four different zones that provide high QoS at high performance points, with performance degradation toward lower performance points being modest. The power/thermal constraint system specifies the specific performance that an SSD will be able to best meet using two methods at different performance points.

Inventors

  • J. Vilaiko
  • D. Wortmann
  • R. Anconina
  • N. Elmale
  • J.G. Hahn

Assignees

  • 闪迪技术公司

Dates

Publication Date
20260505
Application Date
20250108
Priority Date
20240227

Claims (20)

  1. 1. A data storage device, the data storage device comprising: Memory device, and A controller coupled to the memory device, wherein the memory device is configured to: adjusting a link speed between the data storage device and a host device; Alternating the power state duty cycle between an active state and an idle state, and The adjusting and the alternating are adjusted to achieve a predetermined energy usage and quality of service (QoS).
  2. 2. The data storage device of claim 1, wherein the adjusting and the alternating occur in parallel.
  3. 3. The data storage device of claim 1, wherein the controller comprises a link speed inference engine.
  4. 4. The data storage device of claim 3, wherein the controller further comprises an energy management duty cycle driver.
  5. 5. The data storage device of claim 1, wherein the controller is configured to increase or decrease the link speed.
  6. 6. The data storage device of claim 5, wherein the increasing or decreasing is in response to changing a data storage device condition.
  7. 7. The data storage device of claim 6, wherein the controller is configured to maintain the predetermined energy usage based on the adjustment.
  8. 8. The data storage device of claim 6, wherein the controller is configured to maintain the QoS based on the adjustment.
  9. 9. The data storage device of claim 1, wherein the controller is configured to receive an indication of a predetermined amount of power that can be consumed.
  10. 10. The data storage device of claim 1, wherein the adjustment is responsive to a thermal measurement.
  11. 11. A data storage device, the data storage device comprising: And a controller coupled to the memory device, wherein the memory device is configured to: calculating a system average power budget; Calculating a link speed in a link speed module; calculating a duty cycle between an active state and an idle state in an energy management duty cycle driver, and An energy budget for the data storage device is set.
  12. 12. The data storage device of claim 11, wherein the controller comprises a host traffic monitoring driver.
  13. 13. The data storage device of claim 11, wherein the controller comprises an energy management duty cycle driver.
  14. 14. The data storage device of claim 13, wherein the controller comprises a link speed interface engine, wherein the link speed interface engine has an output fed into the energy management duty cycle driver.
  15. 15. The data storage device of claim 11, wherein the controller comprises a non-volatile memory express (NVMe) host average power unit configured to receive input of a system power limit and a host-driven NVMe power state.
  16. 16. The data storage device of claim 15, wherein the controller comprises a temperature driven average power limit and leakage compensation module configured to receive an input of a thermal detector.
  17. 17. The data storage device of claim 16, wherein the controller comprises a system average power budget module configured to receive inputs from the NVMe host average power unit and the temperature driven average power limit and leakage compensation module.
  18. 18. A data storage device, the data storage device comprising: And a controller coupled to the means for storing data, wherein the controller is configured to: Allocating an energy budget for an element of the data storage device; Receiving host equipment setting parameters; Receiving an internal parameter of a component for storing data; detecting a change in operating conditions; changing a link speed based on the host device setting parameters and internal parameters of the means for storing data, and The power state is changed based on the host device setting parameters and internal parameters of the means for storing data.
  19. 19. The data storage device of claim 18, wherein the controller is configured to translate a power limit received from a host device into an energy value.
  20. 20. The data storage device of claim 19, wherein the controller is configured to calculate an amount of energy that can be used in a particular time window.

Description

SSD power management using hybrid PCIe link state approach Cross Reference to Related Applications The present application claims the benefit and priority of U.S. non-provisional patent application serial No. 18/588,236 filed on day 27, 2, 2024. Background Technical Field Embodiments of the present disclosure generally relate to maximizing system efficiency limited by power or thermal constraints. Description of the Related Art Solid State Drives (SSDs) typically implement power management policies such as Peripheral Component Interconnect (PCI) express (PCIe) link speed regulation and PCIe link power state management. In PCIe link speed adjustment, the link speed is changed to match the power/performance requirements of the SSD device and the host device. However, switching between PCIe link speeds can result in latency and conversion energy costs, and can also drive the backend to run at lower than maximum speed performance. PCIe link speed adjustment schemes do not allow the backend to enter an idle state. With respect to PCIe link power state management, PCIe links alternate between an active state L0 and an idle state L1. X. Switching between PCIe power states enables the backend to enter an idle state. However, switching between PCIe link power states also results in latency and translation energy costs, and this strategy has a lower quality of service (QoS). There is a need in the art for improved SSD power management while utilizing PCIe link speed regulation and PCIe link power states. Disclosure of Invention In contrast to utilizing Peripheral Component Interconnect (PCI) express (PCIe) link speed adjustment and PCIe link power state alone, PCIe link speed adjustment and PCIe link power state policies are used in combination. The combination balances PCIe front-end energy costs, back-end energy costs, and quality of service (QoS). The performance/power space of a Solid State Drive (SSD) is mapped to PCIe link speed adjustment and PCIe link power state policies to configure four different zones that provide high QoS at high performance points, with performance degradation toward lower performance points being modest. The power/thermal constraint system specifies the specific performance that an SSD will be able to best meet using two methods at different performance points. In one embodiment, a data storage device includes a memory device and a controller coupled to the memory device, wherein the memory device is configured to adjust a link speed between the data storage device and a host device, alternate a power state duty cycle between an active state and an idle state, and adjust the adjusting and the alternating to achieve a predetermined energy usage and quality of service (QoS). In another embodiment, a data storage device includes a memory device and a controller coupled to the memory device, wherein the memory device is configured to calculate a system average power budget, calculate a link speed in a link speed module, calculate a duty cycle between an active state and an idle state in an energy management duty cycle driver, and set an energy budget for the data storage device. In another embodiment, a data storage device includes means for storing data, and a controller coupled to the means for storing data, wherein the controller is configured to allocate an energy budget for an element of the data storage device, receive a host device setting parameter, receive an internal parameter of the means for storing data, detect a change in an operating condition, change a link speed based on the host device setting parameter and the internal parameter of the means for storing data, and change a power state based on the host device setting parameter and the internal parameter of the means for storing data. Drawings So that the manner in which the above recited features of the present disclosure can be understood in detail, a more particular description of the disclosure, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this disclosure and are therefore not to be considered limiting of its scope, for the disclosure may admit to other equally effective embodiments. FIG. 1 is a schematic block diagram illustrating a storage system in which a data storage device may be used as a storage device for a host device, according to some embodiments. Fig. 2 is an illustration of a link state flow diagram according to some embodiments. Fig. 3 is a block diagram illustrating a system for performance spatial mapping according to some embodiments. Fig. 4 is a block diagram illustrating a system for autonomous management of PCIe link speed and PCIe link power state by an SSD client device, according to some embodiments. Fig. 5 is a block diagram illustrating a system for hybrid SSD power management, according to certain embodiments. FIG. 6 is a bl