CN-121986570-A - Gate trench power semiconductor device with shaped deep support shield to reduce cell pitch and on-state resistance

Abstract

A semiconductor device, in particular a trench gate vertical MOSFET, comprises a silicon carbide based semiconductor layer structure and a first gate trench (180, 182, 184) extending into an upper portion of the semiconductor layer structure. The semiconductor layer structure includes a drift region (120) having a first conductivity type, a well layer (130) having a second conductivity type, and a support shield (150) having the second conductivity type. The width of the first segment of the support shield deeper in the semiconductor layer structure than the well layer and shallower in the semiconductor layer structure than the bottom of the first gate trench decreases with increasing distance from the well region. Further, the support shield (150) may have a buried lateral extension (158A) and the gate trench (180) may have a trench shielding region (152).

Inventors

• M. Sampas
• W. KIM
• N. Isrami
• LIU SHIHENG

Assignees

• 沃孚半导体公司

Dates

Publication Date

20260505

Application Date

20240906

Priority Date

20231006

Claims (20)

1. 1. A semiconductor device, comprising: A semiconductor layer structure including a drift region having a first conductivity type, a well layer having a second conductivity type, and a support shield having the second conductivity type, and A first gate trench extending into an upper portion of the semiconductor layer structure, Wherein the width of the first portion of the support shield decreases with increasing distance from the well region.
2. 2. The semiconductor device of claim 1, wherein the first portion of the support shield comprises a portion deeper in the semiconductor layer structure than the well layer and shallower in the semiconductor layer structure than a bottom of the first gate trench.
3. 3. The semiconductor device of claim 1, wherein an entirety of the support shield deeper than the well layer in the semiconductor layer structure has a width that decreases with increasing distance from the well region.
4. 4. The semiconductor device of any of claims 1-3, wherein a bottom of the first gate trench has a first depth from an upper portion of the semiconductor layer structure and a bottom of the support shield has a second depth from the upper portion of the semiconductor layer structure, wherein the second depth is greater than the first depth.
5. 5. The semiconductor device of claim 4, wherein the semiconductor layer structure further comprises a trench mask region of the second conductivity type under the first gate trench, wherein a bottom of the trench mask region has a third depth from an upper portion of the semiconductor layer structure, and wherein the second depth is greater than the third depth.
6. 6. The semiconductor device of claim 5 wherein the semiconductor layer structure further comprises a buried support shield extension extending laterally from the support shield.
7. 7. The semiconductor device of any of claims 1-6, wherein the semiconductor device comprises a MOSFET, and the semiconductor layer structure further comprises a source layer of the first conductivity type over the well layer, and wherein the gate oxide layer and the gate electrode are in the first gate trench, the gate oxide layer being located between the gate electrode and the semiconductor layer structure.
8. 8. The semiconductor device of claim 7, wherein a maximum width of a portion of the support shield that horizontally overlaps the source region is at least 10% greater than a width of a portion of the support shield that horizontally overlaps a bottom of the first gate trench.
9. 9. The semiconductor device of any of claims 1-8, further comprising a second gate trench extending into an upper portion of the semiconductor layer structure, wherein the support shield is between the first gate trench and the second gate trench.
10. 10. A semiconductor device as claimed in any one of claims 1 to 3, wherein a supporting shield trench is provided in the semiconductor layer structure, the supporting shield trench extending at least partially through the supporting shield, and a conductive material other than silicon carbide is in the supporting shield trench.
11. 11. The semiconductor device of claim 10, wherein the conductive material comprises doped polysilicon.
12. 12. The semiconductor device of claim 10, wherein the conductive material comprises nickel oxide.
13. 13. The semiconductor device of claim 10 wherein the conductive material comprises a metal that forms a schottky contact with silicon carbide.
14. 14. The semiconductor device of claim 10, wherein the support shield trench does not extend through a bottom surface of the support shield.
15. 15. A semiconductor device, comprising: A semiconductor layer structure including a drift region having a first conductivity type, a JFET region having the first conductivity type on an upper portion of the drift region, a well layer having a second conductivity type on an upper portion of the JFET region, and a support shield having the second conductivity type, the JFET region having a higher doping concentration of the first conductivity type than the drift region, and A first gate trench extending into an upper portion of the semiconductor layer structure; Wherein a first portion of the JFET region between the first gate trench and the support shield has a width that increases with increasing distance from the well layer.
16. 16. The semiconductor device of claim 15, wherein at least a portion of the support shield has a width that decreases with increasing distance from an upper portion of the semiconductor layer structure.
17. 17. The semiconductor device of claim 15, wherein a bottom of the first gate trench has a first depth from an upper portion of the semiconductor layer structure and a bottom of the support shield has a second depth from the upper portion of the semiconductor layer structure, wherein the second depth is greater than the first depth.
18. 18. The semiconductor device of claim 17, wherein the semiconductor layer structure further comprises a trench mask region of the second conductivity type under the first gate trench, wherein a bottom of the trench mask region has a third depth from an upper portion of the semiconductor layer structure, and wherein the second depth is greater than the third depth.
19. 19. The semiconductor device of claim 18, wherein the semiconductor layer structure further comprises a buried support shield extension extending laterally from the support shield.
20. 20. The semiconductor device of claim 19 wherein the support shield extension extends laterally a distance between 0.1 and 5.0 microns.

Description

Gate trench power semiconductor device with shaped deep support shield to reduce cell pitch and on-state resistance Cross Reference to Related Applications The present application claims priority from U.S. patent application Ser. No. 18/482,105, filed on 6/10/2023, the entire contents of which are incorporated herein by reference. Technical Field The present invention relates to power semiconductor devices, and more particularly to power semiconductor devices having gate trenches and methods of fabricating such devices. Background Metal oxide semiconductor field effect transistors ("MOSFETs") are a well known type of semiconductor transistor that can be used as a switch. A MOSFET is a three terminal device having gate, drain and source terminals and a semiconductor body. The semiconductor body is referred to herein as a "semiconductor layer structure" and may include one or more semiconductor layers/regions. A source region and a drain region separated by a channel region are formed in the semiconductor layer structure. A gate electrode (which may act as a gate terminal or be electrically connected to a gate terminal) is disposed adjacent to the channel region and is separated from the channel region by a thin oxide layer. The MOSFET may be turned on or off by setting a bias voltage applied to the gate electrode to a value above or below a threshold value. When the MOSFET is turned on (i.e., in its "on state"), current is conducted between the source and drain regions through the channel region. When the bias voltage drops below a threshold level, current ceases to conduct through the channel region. An n-type MOSFET includes source and drain regions having n-type (electron) conductivity and a channel region having p-type (hole) conductivity (i.e., an "n-p-n" design). The n-type MOSFET is turned on when a gate bias voltage is applied to the gate electrode sufficient to create a conductive n-type inversion layer in the p-type channel region, thereby electrically connecting the n-type source region and the drain region and allowing majority carriers to conduct therebetween. The p-type MOSFET has a "p-n-p" design (i.e., p-type source and drain regions and an n-type channel region) and turns on when a gate bias voltage is applied to the gate electrode sufficient to create a conductive p-type inversion layer in the n-type channel region to electrically connect the p-type source and drain regions. Herein, the terms "first conductivity type" and "second conductivity type" are used to indicate either n-type or p-type, wherein the first and second conductivity types are different. Thus, if a first region of the device has a first conductivity type and a second region of the device has a second conductivity type, this means that either the first region has n-type conductivity and the second region has p-type conductivity, or alternatively the first region has p-type conductivity and the second region has n-type conductivity. As described above, the gate electrode of the MOSFET is separated from the channel region by a thin oxide layer called the gate oxide layer. In some applications, other non-oxide gate dielectric layers may be used in place of the gate oxide layer. It will be appreciated that the techniques described herein according to embodiments of the invention are equally applicable to devices having gate dielectric layers formed of materials other than oxide. Because the gate electrode of the MOSFET is insulated from the channel region by the gate oxide layer, a minimum gate current is required to maintain the MOSFET in an on state or to switch the MOSFET between an off state and an on state. Because the gate forms a capacitor with the channel region, the gate current remains small during switching. Thus, only minimal charge and discharge current is required during switching, allowing for simpler gate drive circuitry and faster switching speeds. The MOSFET may be a stand-alone device or may be combined with other circuit devices. For example, insulated gate bipolar transistors ("IGBTs") are semiconductor devices that include both MOSFETs and bipolar junction transistors ("BJTs") that combine the high-impedance gate electrode of the MOSFET with the small on-state conduction losses that the BJTs can provide. IGBTs may be implemented, for example, as Darlington pairs comprising high voltage n-channel MOSFETs at the input and BJTs at the output. The base current of the BJT is supplied through the channel of the MOSFET, allowing for a simplified external drive circuit (since the drive circuit only charges and discharges the gate electrode of the MOSFET). In some applications, the MOSFET may need to carry a large current and/or be capable of blocking high voltages. Such MOSFETs are often referred to as "power" MOSFETs. Power MOSFETs are often made of wide bandgap semiconductor materials (the term "wide bandgap semiconductor" as used herein encompasses any semiconductor having a bandgap of at least 1.4 eV). Power s