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CN-121986571-A - Semiconductor light receiving element, optical line termination device, multi-value intensity modulation/transmission device, digital coherent reception device, optical fiber radio system, SPAD sensor system, and laser radar device

CN121986571ACN 121986571 ACN121986571 ACN 121986571ACN-121986571-A

Abstract

A semiconductor light receiving element (100) is provided with an n-type InP substrate (1), an n-type semiconductor layer (2) formed on the n-type InP substrate (1), a multiplication layer (3) formed on the n-type semiconductor layer (2) and having a layer thickness of 40nm to 170nm inclusive and composed of an InAlAs digital alloy structure in which InAs layers and AlAs layers are alternately laminated, a p-type electric field alleviation layer (4) formed on the multiplication layer (3) and composed of InP or InAlAs, and an InGaAs light absorption layer (5) formed on the p-type electric field alleviation layer (4).

Inventors

  • ISHIMURA EITARO
  • HARUNAKA YAMAGUCHI
  • TAKEMURA RYOTA
  • TSUBOUCHI DAISUKE

Assignees

  • 三菱电机株式会社

Dates

Publication Date
20260505
Application Date
20231012

Claims (20)

  1. 1. A semiconductor light receiving element is characterized in that, The device is provided with: An InP substrate; an n-type semiconductor layer formed over the InP substrate; A multiplication layer formed on the n-type semiconductor layer, having a layer thickness of 40nm or more and 170nm or less, and being composed of a digital alloy structure; A p-type electric field alleviation layer formed over the multiplication layer, and And an InGaAs light absorption layer formed on the p-type electric field alleviation layer.
  2. 2. A semiconductor light receiving element is characterized in that, The device is provided with: An InP substrate; A p-type semiconductor layer formed over the InP substrate; an InGaAs light absorbing layer formed over the p-type semiconductor layer; a p-type electric field alleviation layer formed on the InGaAs light absorption layer, and And a multiplication layer formed on the p-type electric field alleviation layer, having a layer thickness of 40nm or more and 170nm or less, and composed of a digital alloy structure.
  3. 3. The semiconductor light receiving element according to claim 1 or 2, wherein, The multiplication layer is composed of a digital alloy structure in which InAl layers and AlAs layers are alternately laminated.
  4. 4. The semiconductor light-receiving element according to any one of claims 1 to 3, wherein, The thickness of the multiplication layer is 60nm to 130 nm.
  5. 5. The semiconductor light-receiving element according to any one of claims 1 to 4, wherein, The p-type electric field alleviation layer has a layer thickness of 10nm or more and 70nm or less and is composed of random alloy structure.
  6. 6. The semiconductor light receiving element as recited in claim 5, wherein, The p-type electric field alleviation layer is composed of InP or InAlAs.
  7. 7. The semiconductor light-receiving element according to any one of claims 1 to 4, wherein, The p-type electric field alleviation layer has a layer thickness of 10nm or more and 130nm or less and is composed of a digital alloy structure.
  8. 8. The semiconductor light receiving element as recited in claim 7, wherein, The p-type electric field alleviation layer is composed of InAlAs digital alloy structure formed by alternately laminating InAs layers and AlAs layers.
  9. 9. The semiconductor light-receiving element according to any one of claims 1 to 8, wherein, The p-type electric field alleviation layer is doped with beryllium or zinc as p-type impurity.
  10. 10. The semiconductor light receiving element according to claim 1, wherein, The n-type semiconductor layer is doped with silicon as an n-type impurity.
  11. 11. The semiconductor light receiving element according to claim 1, wherein, An i-type or n-type window layer is formed over the InGaAs light absorbing layer, a p-type impurity diffusion region is formed within the window layer, and a p-type electrode is disposed over the p-type impurity diffusion region.
  12. 12. The semiconductor light receiving element as recited in claim 11, wherein, The n-type semiconductor layer is an n-type conductive layer, and an n-type electrode is provided at a portion where the n-type conductive layer formed on the InP substrate is partially exposed.
  13. 13. The semiconductor light receiving element as recited in claim 12, wherein, A separation groove reaching the n-type conductive layer is provided at an outer peripheral portion of the p-type impurity diffusion region.
  14. 14. The semiconductor light receiving element as recited in claim 11, wherein, An incident region for light is provided on the back surface of the InP substrate opposite to the p-type electrode.
  15. 15. The semiconductor light receiving element according to claim 1, wherein, A p-type contact layer having an outer peripheral portion provided so as to be smaller in area than the multiplication layer is formed on the InGaAs light absorption layer, and a p-type electrode is provided on the p-type contact layer.
  16. 16. The semiconductor light-receiving element according to any one of claims 1 to 15, wherein, The dead zone length is 50nm or more and 90nm or less.
  17. 17. The semiconductor light-receiving element according to any one of claims 1 to 15, wherein, The ratio of the dead zone length to the layer thickness of the multiplication layer is 29% or more and less than 100%.
  18. 18. The semiconductor light-receiving element according to any one of claims 1 to 15, wherein, The ionization rate ratio k is 0.1 or less.
  19. 19. The semiconductor light-receiving element according to any one of claims 1 to 15, wherein, The multiplication rate at a voltage of 90% of the breakdown voltage is 10 times or less.
  20. 20. An optical line termination device, characterized in that, The device is provided with: The semiconductor light-receiving element according to any one of claims 1 to 19; A light multiplexer/demultiplexer for inputting an optical signal to the semiconductor light receiving element; an amplifying circuit that amplifies an electric signal output from the semiconductor light receiving element; A clock data recovery circuit connected to the amplifying circuit for recovering clock and data from the amplified electric signal, and And the forward error correction circuit is connected with the clock data recovery circuit and corrects the errors of the clock and the data.

Description

Semiconductor light receiving element, optical line termination device, multi-value intensity modulation/transmission device, digital coherent reception device, optical fiber radio system, SPAD sensor system, and laser radar device Technical Field The present disclosure relates to a semiconductor light receiving element, an optical line termination device, a multi-value intensity modulation transmitting/receiving device, a digital coherent receiving device, an optical fiber wireless system, a SPAD sensor system, and a laser radar device. Background With the progress of digital transformation using digital information, a communication network for communicating digital information with each other and a data center for accumulating data have been remarkably developed. Communication networks and intra-data center communication use optical communication. In recent years, the speed and capacity of optical communication have been remarkably increased. In the progress of optical communication, avalanche photodiodes (AVALANCHE PHOTODIODE: APD) capable of obtaining high reception sensitivity are used as receivers of optical communication. In an access network connected to an optical communication subscriber, a passive optical network (Passive Optical Network: PON) is adopted as a main mode. The PON system starts with a G (E) -PON system transmitting signals of 1 to 2Gbps, and it is expected that 10G-EPON systems and XG-PON systems transmitting signals of 10Gbps will increase in the future. In addition, in ITU-T (International Telecommunication Union Telecommunication Standardization Sector: international telecommunication Union telecommunication standards division), a 50G-PON system is being studied as a next-generation high-speed PON system, and it is expected that the practical use of 50 Gbps-level transmission in an access network is expected. APDs, which are semiconductor light receiving elements used in PON systems, are each composed of a light absorbing layer (InGaAs), an electric field relaxing layer (InP or inaias), and a multiplication layer (InP or inaias) as element structures. The electron and hole generated in the light absorbing layer are multiplied, that is, ionized, by applying a high electric field of about 800kV/cm to the multiplication layer. The electric field alleviation layer functions to attenuate the electric field so that the high electric field of the multiplication layer is not applied to the light absorbing layer. Incidentally, the ionization rate (ionization rate) of electrons is expressed as α, and the ionization rate of holes is expressed as β. In APD, the larger the ratio of the ionization ratios of electrons and holes is, the smaller the excessive noise generated during multiplication is, and the higher the reception sensitivity is. Further, the larger the ratio of the ionization rates of electrons and holes, the shorter the multiplication time in the multiplication layer, and hence the wider the bandwidth. The ionization rate ratio k of electrons and holes is defined by k=β/α. The smaller the ionization rate ratio k, the more improved the APD performance when electrons are injected into the multiplication layer. As a multiplication layer of an APD for optical communication, a compound semiconductor material such as inaias or InP is used. When inaias is selected as the constituent material of the multiplication layer, the difference in ionization rate between electrons and holes becomes larger than InP. In InP, the ionization rate of holes is larger than that of electrons, and the ionization rate of holes is about 2 times that of electrons. On the other hand, when inaias is selected as the constituent material of the multiplication layer, the ionization rate of electrons is larger than that of holes, and the ionization rate of electrons is about 5 times that of holes. Therefore, when inaias is used as the multiplication layer, the reception sensitivity is further improved, and thus inaias is more suitable than InP as a constituent material of the multiplication layer of APD. As described above, in the PON system, an APD as a semiconductor light receiving element requires a wide response bandwidth and high reception sensitivity. However, in APD, unlike PD, the time required for multiplication, that is, the multiplication time becomes longer as the multiplication rate increases, and therefore there is a problem that the bandwidth decreases at a high multiplication rate. Although APDs having multiplication layers made of inaias for optical communication have a wider bandwidth than APDs made of other semiconductor materials, when the multiplication ratio is 6 or more, the bandwidth is limited to about 20 GHz. That is, there is a problem that it is difficult to achieve a bandwidth of about 37.5GHz or more required for a 50G-PON system when an existing APD is applied. Patent document 1 U.S. patent application publication No. 2022/0099813 specification Non-patent literature 1:Jiyuan Zheng et